Akira Hatanaka 3531db14c6 [mips] Define register class FGRH32 for the high half of the 64-bit floating ...

point registers. We will need this register class later when we add
definitions for instructions mfhc1 and mthc1. Also, remove sub-register indices
sub_fpeven and sub_fpodd and use sub_lo and sub_hi instead.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188842 91177308-0d34-0410-b5e6-96231b3b80d8

2013-08-20 22:58:56 +00:00

..

CMakeLists.txt

Add stub methods for mips assembly matcher.

2012-08-17 20:16:42 +00:00

LLVMBuild.txt

…

Makefile

…

MipsAsmParser.cpp

[mips] Define register class FGRH32 for the high half of the 64-bit floating

2013-08-20 22:58:56 +00:00