Jakob Stoklund Olesen 36d29bc723 Remove extra MayLoad/MayStore flags from atomic_load/store. ... These extra flags are not required to properly order the atomic load/store instructions. SelectionDAGBuilder chains atomics as if they were volatile, and SelectionDAG::getAtomic() sets the isVolatile bit on the memory operands of all atomic operations. The volatile bit is enough to order atomic loads and stores during and after SelectionDAG. This means we set mayLoad on atomic_load, mayStore on atomic_store, and mayLoad+mayStore on the remaining atomic read-modify-write operations. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162733 91177308-0d34-0410-b5e6-96231b3b80d8		2012-08-28 03:11:32 +00:00
..
ARM	Make sure we add the predicate after all of the registers are added.	2012-08-27 22:12:44 +00:00
CellSPU	Add test triples to fix win32 failures. Revert workaround from r161292.	2012-08-08 20:31:37 +00:00
CPP
Generic	BranchProb: modify the definition of an edge in BranchProbabilityInfo to handle	2012-08-24 18:14:27 +00:00
Hexagon	Remove extra MayLoad/MayStore flags from atomic_load/store.	2012-08-28 03:11:32 +00:00
MBlaze
Mips	Fix mips' long branch pass.	2012-08-28 03:03:05 +00:00
MSP430	Reapply r161633-161634 "Partition use lists so defs always come before uses.""	2012-08-10 00:21:30 +00:00
NVPTX
PowerPC	Allow remat of LI on PPC.	2012-08-28 02:10:33 +00:00
SPARC
Thumb
Thumb2	Add ADD and SUB to the predicable ARM instructions.	2012-08-16 23:21:55 +00:00
X86	llvm/test/CodeGen/X86/fma.ll: Add -march=x86, or two tests would fail on non-x86 hosts.	2012-08-27 11:50:26 +00:00
XCore