Tom Stellard 38aad1c16a R600/SI: Fix bug with v_interp_p1_f32 instructions on 16 bank lds chips ...

The src and dst register cannot be the same on chips with 16 lds banks.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238147 91177308-0d34-0410-b5e6-96231b3b80d8

2015-05-25 16:15:54 +00:00

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Analysis

Revert r236894 "[BasicAA] Fix zext & sext handling"

2015-05-22 01:27:37 +00:00

Assembler

IR / debug info: Add a DWOId field to DICompileUnit,

2015-05-21 20:37:30 +00:00

Bindings

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Bitcode

IR / debug info: Add a DWOId field to DICompileUnit,

2015-05-21 20:37:30 +00:00

BugPoint

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CodeGen

R600/SI: Fix bug with v_interp_p1_f32 instructions on 16 bank lds chips

2015-05-25 16:15:54 +00:00

DebugInfo

AsmPrinter: Emit the DwarfStringPool offset directly when possible

2015-05-24 16:14:59 +00:00

ExecutionEngine

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Feature

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FileCheck

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Instrumentation

Fix the check strings in a test case committed in r212455.

2015-05-15 00:12:26 +00:00

Integer

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JitListener

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Linker

Changed renaming of local symbols by inserting a dot vefore the numeric suffix.

2015-05-12 16:47:30 +00:00

LTO

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MC

This patch adds support for the vector quadword add/sub instructions introduced

2015-05-25 15:49:26 +00:00

Object

Stop inventing symbol sizes.

2015-05-22 15:43:00 +00:00

Other

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SymbolRewriter

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TableGen

[TableGen] Resolve complex def names inside multiclasses

2015-05-21 04:32:56 +00:00

tools

Stop inventing symbol sizes.

2015-05-22 15:43:00 +00:00

Transforms

Correct a mistaken comment from 238071 [NFC]

2015-05-23 00:05:43 +00:00

Unit

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Verifier

[Verifier] Assert gc_relocate always return a pointer type

2015-05-18 19:50:14 +00:00

YAMLParser

YAML: Implement block scalar parsing.

2015-05-13 23:10:51 +00:00

.clang-format

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CMakeLists.txt

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lit.cfg

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lit.site.cfg.in

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Makefile

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Makefile.tests

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TestRunner.sh

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