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a24262a0f5
to test it with chapni's fix (-mattr=+avx). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166985 91177308-0d34-0410-b5e6-96231b3b80d8
27 lines
881 B
LLVM
27 lines
881 B
LLVM
; RUN: llc < %s -march=x86 -mattr=+avx | FileCheck %s
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; CHECK: test
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; Test case when creating pshufhw, we incorrectly set the higher order bit
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; for an undef,
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define void @test(<8 x i16>* %dest, <8 x i16> %in) nounwind {
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entry:
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; CHECK-NOT: vmovaps
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; CHECK: vmovlpd
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; CHECK: vpshufhw $-95
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%0 = load <8 x i16>* %dest
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%1 = shufflevector <8 x i16> %0, <8 x i16> %in, <8 x i32> < i32 0, i32 1, i32 2, i32 3, i32 13, i32 undef, i32 14, i32 14>
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store <8 x i16> %1, <8 x i16>* %dest
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ret void
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}
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; CHECK: test2
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; A test case where we shouldn't generate a punpckldq but a pshufd and a pslldq
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define void @test2(<4 x i32>* %dest, <4 x i32> %in) nounwind {
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entry:
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; CHECK-NOT: pslldq
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; CHECK: shufps
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%0 = shufflevector <4 x i32> %in, <4 x i32> <i32 0, i32 0, i32 0, i32 0>, <4 x i32> < i32 undef, i32 5, i32 undef, i32 2>
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store <4 x i32> %0, <4 x i32>* %dest
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ret void
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}
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