Igor Breger 191108c6b8 AVX512: Implemented encoding and intrinsics for vshufps/d. ... Added tests for intrinsics and encoding. Differential Revision: http://reviews.llvm.org/D11709 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246640 91177308-0d34-0410-b5e6-96231b3b80d8		2015-09-02 10:50:58 +00:00
..
AArch64	[llvm-readobj] MachO -- correctly dump section field 'Reserved3'	2015-09-01 16:29:02 +00:00
AMDGPU	AMDGPU: Add sdst operand to VOP2b instructions	2015-08-29 07:16:50 +00:00
ARM	DI: Require subprogram definitions to be distinct	2015-08-28 20:26:49 +00:00
AsmParser	[MC/AsmParser] Avoid setting MCSymbol.IsUsed in some cases	2015-08-31 17:44:53 +00:00
COFF	[MC] Generate a timestamp for COFF object files	2015-09-01 23:46:11 +00:00
Disassembler	[llvm-mc] Ignore opcode size prefix in 64-bit CALL disassembly	2015-08-26 16:20:29 +00:00
ELF	DI: Require subprogram definitions to be distinct	2015-08-28 20:26:49 +00:00
Hexagon
MachO	[MC] Convert tests to use llvm-readobj --macho-version-min.	2015-08-28 12:40:05 +00:00
Markup
Mips	[mips][microMIPS] Add microMIPS32r6 and microMIPS64r6 tests for existing 16-bit ADDIUR1SP, ADDIUR2, ADDIUS5 and ADDIUSP instructions	2015-08-20 11:51:49 +00:00
PowerPC	Scalar to vector conversions using direct moves	2015-08-13 17:40:44 +00:00
Sparc	Fix CHECK directives that weren't checking.	2015-08-31 21:10:35 +00:00
SystemZ
X86	AVX512: Implemented encoding and intrinsics for vshufps/d.	2015-09-02 10:50:58 +00:00