Roman Tereshin e55b052e03 [GlobalISel][Legalizer] Look thro copies while combining G_UNMERGE's ...

As we're becoming stricter w/ respect to not allowing vregs having LLTs
and regclasses assigned both mid-globalisel pipeline, the number of
extra copies grows, some of which separate G_UNMERGE's from their
corresponding G_MERGE's, becoming a performance concern.

It's worth mentioning that we're already looking through copies while
combining legalization artifacts for every kind of artifact but
G_UNMERGE.

Reviewed By: aditya_nandakumar

Reviewers: ab, t.p.northover, volkan, javed.absar

Subscribers: rovka, kristof.beyls, llvm-commits

Differential Revision: https://reviews.llvm.org/D45644


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330660 91177308-0d34-0410-b5e6-96231b3b80d8

2018-04-23 22:28:36 +00:00

..

AArch64

[GlobalISel][Legalizer] Look thro copies while combining G_UNMERGE's

2018-04-23 22:28:36 +00:00

AMDGPU

AMDGPU: Move a flawed assert when spilling SGPRs

2018-04-23 16:13:30 +00:00

ARC

[ARC] Add ARC backend.

2017-08-24 15:40:33 +00:00

ARM

[DAGCombine] (float)((int) f) --> ftrunc (PR36617)

2018-04-20 15:07:55 +00:00

AVR

[AVR] Add a regression test for struct return lowering

2018-03-20 11:23:03 +00:00

BPF

bpf: fix incorrect SELECT_CC lowering

2018-04-03 03:56:37 +00:00

Generic

Revert "Fix incorrect choice of callee-saved registers save/restore points (take 2)"

2018-04-17 16:29:58 +00:00

Hexagon

[Hexagon] Improve HVX instruction selection (bitcast, vsplat)

2018-04-20 19:38:37 +00:00

Inputs

…

Lanai

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

Mips

[mips] Correct the definitions of the unaligned word memory operation instructions

2018-04-19 13:33:51 +00:00

MIR

[if-converter] Handle BBs that terminate in ret during diamond conversion

2018-04-19 17:26:46 +00:00

MSP430

Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)

2018-01-19 17:13:12 +00:00

Nios2

[Nios2] Arithmetic instructions for R1 and R2 ISA.

2018-01-09 11:15:08 +00:00

NVPTX

[NVPTX, CUDA] Added support for m8n32k16 and m32n8k16 variants of wmma instructions.

2018-04-18 21:51:48 +00:00

PowerPC

[PowerPC] fix incorrect vectorization of abs() on POWER9

2018-04-21 09:32:17 +00:00

RISCV

[RISCV] Add test changes missed from rL330293

2018-04-18 20:36:12 +00:00

SPARC

Revert "This pass, fixing an erratum in some LEON 2 processors..."

2018-04-20 07:53:27 +00:00

SystemZ

[PostRASink]Add register dependency check for implicit operands

2018-04-13 14:23:09 +00:00

Thumb

Reapply ARM: Do not spill CSR to stack on entry to noreturn functions

2018-04-07 10:57:03 +00:00

Thumb2

MachO: trap unreachable instructions

2018-04-13 22:25:20 +00:00

WebAssembly

[WebAssembly] Teach fast-isel to gracefully recover from illegal return types.

2018-04-17 20:46:42 +00:00

WinCFGuard

Reland "Emit Function IDs table for Control Flow Guard"

2018-01-09 23:49:30 +00:00

WinEH

Make x86 __ehhandler comdat if parent function is

2017-10-20 17:04:43 +00:00

X86

[DAGCombiner] Unfold scalar masked merge if profitable

2018-04-23 20:38:49 +00:00

XCore

Use .set instead of = when printing assignment in assembly output

2018-03-27 16:44:41 +00:00