llvm/Sparc at 3cb7187d5f217dc7ecfff36357b0dd754fd0ae3b - llvm

RPCS3/llvm

mirror of https://github.com/RPCS3/llvm.git synced 2024-12-29 07:53:33 +00:00

History

Chris Lattner 3cb7187d5f fix the int<->fp instructions, which apparently take a single float register to represent the int part (because it's always 32-bits) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24976 91177308-0d34-0410-b5e6-96231b3b80d8		2005-12-23 05:00:16 +00:00
..
.cvsignore	ignore generated files	2005-09-07 23:47:44 +00:00
DelaySlotFiller.cpp	Remove trailing whitespace	2005-04-21 23:30:14 +00:00
FPMover.cpp	add fneg/fabs support for doubles	2005-12-19 00:50:12 +00:00
Makefile	Add the framework for a dag-dag isel	2005-12-17 07:47:01 +00:00
README.txt	add fneg,fabs,fsqrt instructions	2005-12-17 23:20:27 +00:00
Sparc.h	Add the framework for a dag-dag isel	2005-12-17 07:47:01 +00:00
Sparc.td
SparcAsmPrinter.cpp	The sun assembler only supports .xword in V9 mode.	2005-12-18 23:36:45 +00:00
SparcInstrFormats.td	Push ops list, asm string, and pattern all the way up to InstV8. Move the	2005-12-18 08:21:00 +00:00
SparcInstrInfo.cpp	Tighten up some checks	2005-12-18 06:40:34 +00:00
SparcInstrInfo.h	Remove trailing whitespace	2005-04-21 23:30:14 +00:00
SparcInstrInfo.td	fix the int<->fp instructions, which apparently take a single float register	2005-12-23 05:00:16 +00:00
SparcISelDAGToDAG.cpp	fix the int<->fp instructions, which apparently take a single float register	2005-12-23 05:00:16 +00:00
SparcRegisterInfo.cpp	Reserve G1 for frame offset stuff and use it to handle large stack frames.	2005-12-20 07:56:31 +00:00
SparcRegisterInfo.h	Pass extra regclasses into spilling code	2005-09-30 01:29:42 +00:00
SparcRegisterInfo.td	Reserve G1 for frame offset stuff and use it to handle large stack frames.	2005-12-20 07:56:31 +00:00
SparcTargetMachine.cpp	Run lower-switch after lower-invoke.	2005-12-20 08:00:11 +00:00
SparcTargetMachine.h	Remove JIT support, which doesn't work.	2005-12-16 06:06:07 +00:00
SparcV8ISelSimple.cpp	Elimiante SP and FP, which weren't members of the IntRegs register class	2005-12-19 00:06:52 +00:00

README.txt

Meta TODO list:
1. Create a new DAG -> DAG instruction selector, by adding patterns to the
   instructions.
2. ???
3. profit!


SparcV8 backend skeleton
------------------------

This directory houses a 32-bit SPARC V8 backend employing an expander-based
instruction selector.  It is not yet functionally complete.  Watch
this space for more news coming soon!

Current expected test failures
------------------------------

Here are the currently-expected SingleSource failures for V8
(Some C++ programs are crashing in libstdc++ at the moment;
I'm not sure why.)

  (llc) SingleSource/Regression/C++/EH/exception_spec_test
  (llc) SingleSource/Regression/C++/EH/throw_rethrow_test

Here are the currently-expected MultiSource failures for V8:

  (llc,cbe) MultiSource/Applications/d/make_dparser
  (llc,cbe) MultiSource/Applications/hexxagon
  (llc) MultiSource/Benchmarks/Fhourstones
  (llc,cbe) MultiSource/Benchmarks/McCat/03-testtrie
  (llc) MultiSource/Benchmarks/McCat/18-imp
  (llc,cbe) MultiSource/Benchmarks/Prolangs-C/bison/mybison
  (llc,cbe) MultiSource/Benchmarks/Prolangs-C/fixoutput
  (llc,cbe) MultiSource/Benchmarks/Prolangs-C/gnugo
  (llc,cbe) MultiSource/Benchmarks/Prolangs-C/plot2fig
  (llc,cbe) MultiSource/Benchmarks/Ptrdist/anagram
  (llc,cbe) MultiSource/Benchmarks/FreeBench/analyzer
    * DANGER * analyzer will run the machine out of VM
  (I don't know whether the following fail in cbe:)
  (llc) MultiSource/Benchmarks/FreeBench/distray
  (llc) MultiSource/Benchmarks/FreeBench/fourinarow
  (llc) MultiSource/Benchmarks/FreeBench/pifft
  (llc) MultiSource/Benchmarks/MallocBench/gs
  (llc) MultiSource/Benchmarks/Prolangs-C++/deriv1
  (llc) MultiSource/Benchmarks/Prolangs-C++/deriv2

Known SPEC failures for V8 (probably not an exhaustive list):

  (llc) 134.perl
  (llc) 177.mesa
  (llc) 188.ammp -- FPMover bug?
  (llc) 256.bzip2
  (llc,cbe) 130.li
  (native,llc,cbe) 126.gcc
  (native,llc,cbe) 255.vortex

To-do
-----

* support shl on longs (fourinarow needs this)
* support casting 64-bit integers to FP types (fhourstones needs this)
* support FP rem (call fmod)

* Keep the address of the constant pool in a register instead of forming its
  address all of the time.

* Change code like this:
        or      %o0, %lo(.CPI_main_0), %o0
        ld      [%o0+0], %o0
  into:
        ld	[%o0+%lo(.CPI_main_0)], %o0
  for constant pool access.

* We can fold small constant offsets into the %hi/%lo references to constant
  pool addresses as well.

* Directly support select instructions, and fold setcc instructions into them
  where possible.  I think this is what afflicts the inner loop of Olden/tsp
  (hot block = tsp():no_exit.1.i, overall GCC/LLC = 0.03).

$Date$