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https://github.com/RPCS3/llvm.git
synced 2026-07-25 12:46:21 -04:00
David Green
3d765ce4b7
This adds the plumbing for the Tiny code model for the AArch64 backend. This, instead of loading addresses through the normal ADRP;ADD pair used in the Small model, uses a single ADR. The 21 bit range of an ADR means that the code and its statically defined symbols need to be within 1MB of each other. This makes it mostly interesting for embedded applications where we want to fit as much as we can in as small a space as possible. Differential Revision: https://reviews.llvm.org/D49673 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340397 91177308-0d34-0410-b5e6-96231b3b80d8
55 lines
1.2 KiB
LLVM
55 lines
1.2 KiB
LLVM
; RUN: llc -mtriple=aarch64-none-eabi -code-model=tiny < %s | FileCheck %s
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@var8 = global i8 0
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@var16 = global i16 0
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@var32 = global i32 0
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@var64 = global i64 0
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define i8* @global_addr() {
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; CHECK-LABEL: global_addr:
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ret i8* @var8
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; The adr calculation should end up returned directly in x0.
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; CHECK: adr x0, var8
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; CHECK-NEXT: ret
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}
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define i8 @global_i8() {
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; CHECK-LABEL: global_i8:
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%val = load i8, i8* @var8
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ret i8 %val
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; CHECK: adr x[[ADDR_REG:[0-9]+]], var8
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; CHECK: ldrb w0, [x[[ADDR_REG]]]
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}
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define i16 @global_i16() {
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; CHECK-LABEL: global_i16:
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%val = load i16, i16* @var16
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ret i16 %val
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; CHECK: adr x[[ADDR_REG:[0-9]+]], var16
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; CHECK: ldrh w0, [x[[ADDR_REG]]]
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}
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define i32 @global_i32() {
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; CHECK-LABEL: global_i32:
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%val = load i32, i32* @var32
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ret i32 %val
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; CHECK: adr x[[ADDR_REG:[0-9]+]], var32
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; CHECK: ldr w0, [x[[ADDR_REG]]]
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}
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define i64 @global_i64() {
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; CHECK-LABEL: global_i64:
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%val = load i64, i64* @var64
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ret i64 %val
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; CHECK: adr x[[ADDR_REG:[0-9]+]], var64
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; CHECK: ldr x0, [x[[ADDR_REG]]]
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}
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define <2 x i64> @constpool() {
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; CHECK-LABEL: constpool:
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ret <2 x i64> <i64 123456789, i64 987654321100>
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; CHECK: adr x[[ADDR_REG:[0-9]+]], {{.LCPI[0-9]+_[0-9]+}}
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; CHECK: ldr q0, [x[[ADDR_REG]]]
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}
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