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086791eca2
One unusual feature of the z architecture is that the result of a previous load can be reused indefinitely for subsequent loads, even if a cache-coherent store to that location is performed by another CPU. A special serializing instruction must be used if you want to force a load to be reattempted. Since volatile loads are not supposed to be omitted in this way, we should insert a serializing instruction before each such load. The same goes for atomic loads. The patch implements this at the IR->DAG boundary, in a similar way to atomic fences. It is a no-op for targets other than SystemZ. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196905 91177308-0d34-0410-b5e6-96231b3b80d8
293 lines
9.7 KiB
LLVM
293 lines
9.7 KiB
LLVM
; Test the handling of base + 12-bit displacement addresses for large frames,
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; in cases where no 20-bit form exists. The tests here assume z10 register
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; pressure, without the high words being available.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | \
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; RUN: FileCheck -check-prefix=CHECK-NOFP %s
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 -disable-fp-elim | \
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; RUN: FileCheck -check-prefix=CHECK-FP %s
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; This file tests what happens when a displacement is converted from
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; being relative to the start of a frame object to being relative to
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; the frame itself. In some cases the test is only possible if two
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; objects are allocated.
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;
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; Rather than rely on a particular order for those objects, the tests
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; instead allocate two objects of the same size and apply the test to
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; both of them. For consistency, all tests follow this model, even if
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; one object would actually be enough.
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; First check the highest in-range offset after conversion, which is 4092
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; for word-addressing instructions like MVHI.
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;
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; The last in-range doubleword offset is 4088. Since the frame has two
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; emergency spill slots at 160(%r15), the amount that we need to allocate
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; in order to put another object at offset 4088 is (4088 - 176) / 4 = 978
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; words.
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define void @f1() {
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; CHECK-NOFP-LABEL: f1:
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; CHECK-NOFP: mvhi 4092(%r15), 42
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; CHECK-NOFP: br %r14
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;
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; CHECK-FP-LABEL: f1:
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; CHECK-FP: mvhi 4092(%r11), 42
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; CHECK-FP: br %r14
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%region1 = alloca [978 x i32], align 8
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%region2 = alloca [978 x i32], align 8
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%ptr1 = getelementptr inbounds [978 x i32]* %region1, i64 0, i64 1
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%ptr2 = getelementptr inbounds [978 x i32]* %region2, i64 0, i64 1
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store volatile i32 42, i32 *%ptr1
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store volatile i32 42, i32 *%ptr2
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ret void
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}
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; Test the first out-of-range offset. We cannot use an index register here.
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define void @f2() {
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; CHECK-NOFP-LABEL: f2:
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; CHECK-NOFP: lay %r1, 4096(%r15)
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; CHECK-NOFP: mvhi 0(%r1), 42
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; CHECK-NOFP: br %r14
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;
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; CHECK-FP-LABEL: f2:
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; CHECK-FP: lay %r1, 4096(%r11)
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; CHECK-FP: mvhi 0(%r1), 42
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; CHECK-FP: br %r14
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%region1 = alloca [978 x i32], align 8
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%region2 = alloca [978 x i32], align 8
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%ptr1 = getelementptr inbounds [978 x i32]* %region1, i64 0, i64 2
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%ptr2 = getelementptr inbounds [978 x i32]* %region2, i64 0, i64 2
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store volatile i32 42, i32 *%ptr1
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store volatile i32 42, i32 *%ptr2
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ret void
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}
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; Test the next offset after that.
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define void @f3() {
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; CHECK-NOFP-LABEL: f3:
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; CHECK-NOFP: lay %r1, 4096(%r15)
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; CHECK-NOFP: mvhi 4(%r1), 42
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; CHECK-NOFP: br %r14
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;
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; CHECK-FP-LABEL: f3:
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; CHECK-FP: lay %r1, 4096(%r11)
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; CHECK-FP: mvhi 4(%r1), 42
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; CHECK-FP: br %r14
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%region1 = alloca [978 x i32], align 8
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%region2 = alloca [978 x i32], align 8
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%ptr1 = getelementptr inbounds [978 x i32]* %region1, i64 0, i64 3
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%ptr2 = getelementptr inbounds [978 x i32]* %region2, i64 0, i64 3
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store volatile i32 42, i32 *%ptr1
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store volatile i32 42, i32 *%ptr2
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ret void
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}
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; Add 4096 bytes (1024 words) to the size of each object and repeat.
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define void @f4() {
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; CHECK-NOFP-LABEL: f4:
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; CHECK-NOFP: lay %r1, 4096(%r15)
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; CHECK-NOFP: mvhi 4092(%r1), 42
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; CHECK-NOFP: br %r14
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;
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; CHECK-FP-LABEL: f4:
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; CHECK-FP: lay %r1, 4096(%r11)
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; CHECK-FP: mvhi 4092(%r1), 42
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; CHECK-FP: br %r14
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%region1 = alloca [2002 x i32], align 8
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%region2 = alloca [2002 x i32], align 8
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%ptr1 = getelementptr inbounds [2002 x i32]* %region1, i64 0, i64 1
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%ptr2 = getelementptr inbounds [2002 x i32]* %region2, i64 0, i64 1
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store volatile i32 42, i32 *%ptr1
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store volatile i32 42, i32 *%ptr2
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ret void
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}
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; ...as above.
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define void @f5() {
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; CHECK-NOFP-LABEL: f5:
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; CHECK-NOFP: lay %r1, 8192(%r15)
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; CHECK-NOFP: mvhi 0(%r1), 42
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; CHECK-NOFP: br %r14
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;
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; CHECK-FP-LABEL: f5:
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; CHECK-FP: lay %r1, 8192(%r11)
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; CHECK-FP: mvhi 0(%r1), 42
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; CHECK-FP: br %r14
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%region1 = alloca [2002 x i32], align 8
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%region2 = alloca [2002 x i32], align 8
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%ptr1 = getelementptr inbounds [2002 x i32]* %region1, i64 0, i64 2
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%ptr2 = getelementptr inbounds [2002 x i32]* %region2, i64 0, i64 2
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store volatile i32 42, i32 *%ptr1
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store volatile i32 42, i32 *%ptr2
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ret void
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}
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; ...as above.
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define void @f6() {
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; CHECK-NOFP-LABEL: f6:
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; CHECK-NOFP: lay %r1, 8192(%r15)
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; CHECK-NOFP: mvhi 4(%r1), 42
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; CHECK-NOFP: br %r14
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;
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; CHECK-FP-LABEL: f6:
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; CHECK-FP: lay %r1, 8192(%r11)
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; CHECK-FP: mvhi 4(%r1), 42
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; CHECK-FP: br %r14
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%region1 = alloca [2002 x i32], align 8
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%region2 = alloca [2002 x i32], align 8
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%ptr1 = getelementptr inbounds [2002 x i32]* %region1, i64 0, i64 3
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%ptr2 = getelementptr inbounds [2002 x i32]* %region2, i64 0, i64 3
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store volatile i32 42, i32 *%ptr1
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store volatile i32 42, i32 *%ptr2
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ret void
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}
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; Now try an offset of 4092 from the start of the object, with the object
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; being at offset 8192. This time we need objects of (8192 - 176) / 4 = 2004
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; words.
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define void @f7() {
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; CHECK-NOFP-LABEL: f7:
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; CHECK-NOFP: lay %r1, 8192(%r15)
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; CHECK-NOFP: mvhi 4092(%r1), 42
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; CHECK-NOFP: br %r14
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;
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; CHECK-FP-LABEL: f7:
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; CHECK-FP: lay %r1, 8192(%r11)
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; CHECK-FP: mvhi 4092(%r1), 42
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; CHECK-FP: br %r14
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%region1 = alloca [2004 x i32], align 8
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%region2 = alloca [2004 x i32], align 8
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%ptr1 = getelementptr inbounds [2004 x i32]* %region1, i64 0, i64 1023
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%ptr2 = getelementptr inbounds [2004 x i32]* %region2, i64 0, i64 1023
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store volatile i32 42, i32 *%ptr1
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store volatile i32 42, i32 *%ptr2
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ret void
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}
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; Keep the object-relative offset the same but bump the size of the
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; objects by one doubleword.
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define void @f8() {
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; CHECK-NOFP-LABEL: f8:
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; CHECK-NOFP: lay %r1, 12288(%r15)
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; CHECK-NOFP: mvhi 4(%r1), 42
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; CHECK-NOFP: br %r14
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;
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; CHECK-FP-LABEL: f8:
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; CHECK-FP: lay %r1, 12288(%r11)
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; CHECK-FP: mvhi 4(%r1), 42
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; CHECK-FP: br %r14
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%region1 = alloca [2006 x i32], align 8
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%region2 = alloca [2006 x i32], align 8
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%ptr1 = getelementptr inbounds [2006 x i32]* %region1, i64 0, i64 1023
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%ptr2 = getelementptr inbounds [2006 x i32]* %region2, i64 0, i64 1023
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store volatile i32 42, i32 *%ptr1
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store volatile i32 42, i32 *%ptr2
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ret void
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}
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; Check a case where the original displacement is out of range. The backend
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; should force STY to be used instead.
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define void @f9() {
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; CHECK-NOFP-LABEL: f9:
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; CHECK-NOFP: lhi [[TMP:%r[0-5]]], 42
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; CHECK-NOFP: sty [[TMP]], 12296(%r15)
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; CHECK-NOFP: br %r14
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;
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; CHECK-FP-LABEL: f9:
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; CHECK-FP: lhi [[TMP:%r[0-5]]], 42
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; CHECK-FP: sty [[TMP]], 12296(%r11)
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; CHECK-FP: br %r14
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%region1 = alloca [2006 x i32], align 8
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%region2 = alloca [2006 x i32], align 8
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%ptr1 = getelementptr inbounds [2006 x i32]* %region1, i64 0, i64 1024
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%ptr2 = getelementptr inbounds [2006 x i32]* %region2, i64 0, i64 1024
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store volatile i32 42, i32 *%ptr1
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store volatile i32 42, i32 *%ptr2
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ret void
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}
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; Repeat f2 in a case that needs the emergency spill slots (because all
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; call-clobbered registers are live and no call-saved ones have been
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; allocated).
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define void @f10(i32 *%vptr) {
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; CHECK-NOFP-LABEL: f10:
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; CHECK-NOFP: stg [[REGISTER:%r[1-9][0-4]?]], [[OFFSET:160|168]](%r15)
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; CHECK-NOFP: lay [[REGISTER]], 4096(%r15)
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; CHECK-NOFP: mvhi 0([[REGISTER]]), 42
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; CHECK-NOFP: lg [[REGISTER]], [[OFFSET]](%r15)
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; CHECK-NOFP: br %r14
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;
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; CHECK-FP-LABEL: f10:
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; CHECK-FP: stg [[REGISTER:%r[1-9][0-4]?]], [[OFFSET:160|168]](%r11)
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; CHECK-FP: lay [[REGISTER]], 4096(%r11)
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; CHECK-FP: mvhi 0([[REGISTER]]), 42
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; CHECK-FP: lg [[REGISTER]], [[OFFSET]](%r11)
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; CHECK-FP: br %r14
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%i0 = load volatile i32 *%vptr
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%i1 = load volatile i32 *%vptr
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%i3 = load volatile i32 *%vptr
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%i4 = load volatile i32 *%vptr
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%i5 = load volatile i32 *%vptr
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%region1 = alloca [978 x i32], align 8
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%region2 = alloca [978 x i32], align 8
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%ptr1 = getelementptr inbounds [978 x i32]* %region1, i64 0, i64 2
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%ptr2 = getelementptr inbounds [978 x i32]* %region2, i64 0, i64 2
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store volatile i32 42, i32 *%ptr1
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store volatile i32 42, i32 *%ptr2
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store volatile i32 %i0, i32 *%vptr
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store volatile i32 %i1, i32 *%vptr
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store volatile i32 %i3, i32 *%vptr
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store volatile i32 %i4, i32 *%vptr
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store volatile i32 %i5, i32 *%vptr
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ret void
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}
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; And again with maximum register pressure. The only spill slots that the
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; NOFP case needs are the emergency ones, so the offsets are the same as for f2.
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; The FP case needs to spill an extra register and is too dependent on
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; register allocation heuristics for a stable test.
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define void @f11(i32 *%vptr) {
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; CHECK-NOFP-LABEL: f11:
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; CHECK-NOFP: stmg %r6, %r15,
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; CHECK-NOFP: stg [[REGISTER:%r[1-9][0-4]?]], [[OFFSET:160|168]](%r15)
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; CHECK-NOFP: lay [[REGISTER]], 4096(%r15)
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; CHECK-NOFP: mvhi 0([[REGISTER]]), 42
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; CHECK-NOFP: lg [[REGISTER]], [[OFFSET]](%r15)
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; CHECK-NOFP: lmg %r6, %r15,
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; CHECK-NOFP: br %r14
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%i0 = load volatile i32 *%vptr
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%i1 = load volatile i32 *%vptr
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%i3 = load volatile i32 *%vptr
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%i4 = load volatile i32 *%vptr
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%i5 = load volatile i32 *%vptr
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%i6 = load volatile i32 *%vptr
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%i7 = load volatile i32 *%vptr
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%i8 = load volatile i32 *%vptr
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%i9 = load volatile i32 *%vptr
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%i10 = load volatile i32 *%vptr
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%i11 = load volatile i32 *%vptr
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%i12 = load volatile i32 *%vptr
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%i13 = load volatile i32 *%vptr
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%i14 = load volatile i32 *%vptr
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%region1 = alloca [978 x i32], align 8
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%region2 = alloca [978 x i32], align 8
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%ptr1 = getelementptr inbounds [978 x i32]* %region1, i64 0, i64 2
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%ptr2 = getelementptr inbounds [978 x i32]* %region2, i64 0, i64 2
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store volatile i32 42, i32 *%ptr1
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store volatile i32 42, i32 *%ptr2
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store volatile i32 %i0, i32 *%vptr
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store volatile i32 %i1, i32 *%vptr
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store volatile i32 %i3, i32 *%vptr
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store volatile i32 %i4, i32 *%vptr
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store volatile i32 %i5, i32 *%vptr
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store volatile i32 %i6, i32 *%vptr
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store volatile i32 %i7, i32 *%vptr
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store volatile i32 %i8, i32 *%vptr
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store volatile i32 %i9, i32 *%vptr
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store volatile i32 %i10, i32 *%vptr
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store volatile i32 %i11, i32 *%vptr
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store volatile i32 %i12, i32 *%vptr
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store volatile i32 %i13, i32 *%vptr
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store volatile i32 %i14, i32 *%vptr
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ret void
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}
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