Evan Cheng 42d60274ea - Move getPhysicalRegisterRegClass() from ScheduleDAG to MRegisterInfo. ...

- Added ability to emit cross class register copies to the BBRU scheduler.
- More aggressive backtracking.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42375 91177308-0d34-0410-b5e6-96231b3b80d8

2007-09-26 21:36:17 +00:00

..

Analysis

Add a newline to the end of this file.

2007-09-25 20:08:48 +00:00

Archive

finishing touches of bytecode -> bitcode changes. also unbreak Windows

2007-07-06 20:28:40 +00:00

AsmParser

Generated files for previous patch.

2007-09-12 03:31:28 +00:00

Bitcode

C bindings for libLLVMCore.a and libLLVMBitWriter.a.

2007-09-18 03:18:57 +00:00

CodeGen

- Move getPhysicalRegisterRegClass() from ScheduleDAG to MRegisterInfo.

2007-09-26 21:36:17 +00:00

Debugger

switch this to bitcode instead of bytecode

2007-05-06 09:29:13 +00:00

ExecutionEngine

Change APFloat::convertFromInteger to take the incoming

2007-09-21 22:09:37 +00:00

Linker

Fix PR1611 - Visibility should be ignored for a declaration

2007-08-19 22:22:54 +00:00

Support

Whitespace and compiler warning cleanup.

2007-09-26 21:33:42 +00:00

System

Remove spurious consts. This fixes warnings with compilers that

2007-09-14 20:08:19 +00:00

Target

- Move getPhysicalRegisterRegClass() from ScheduleDAG to MRegisterInfo.

2007-09-26 21:36:17 +00:00

Transforms

Handle multiple induction variables.

2007-09-25 18:24:48 +00:00

VMCore

Added C and Ocaml bindings for functions, basic blocks, and

2007-09-26 20:56:12 +00:00

Makefile

build lib/Archive instead of lib/Bytecode

2007-05-06 19:50:06 +00:00