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https://github.com/RPCS3/llvm.git
synced 2026-07-19 23:23:38 -04:00
Anton Korobeynikov
695940b0f1
Reapply r346374 with the fixes for modules build. Original summary: This change implements assembler parser, code emitter, ELF object writer and disassembler for the MSP430 ISA. Also, more instruction forms are added to the target description. Patch by Michael Skvortsov! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346948 91177308-0d34-0410-b5e6-96231b3b80d8
58 lines
1.5 KiB
LLVM
58 lines
1.5 KiB
LLVM
; RUN: llc < %s | FileCheck %s
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target datalayout = "e-p:16:16:16-i8:8:8-i16:16:16-i32:16:32-n8:16"
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target triple = "msp430---elf"
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; Function Attrs: nounwind
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define i16 @test(i16 %i) #0 {
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entry:
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; CHECK-LABEL: test:
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; CHECK: sub #4, r1
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; CHECK-NEXT: mov r12, 0(r1)
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; CHECK-NEXT: cmp #4, r12
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; CHECK-NEXT: jhs .LBB0_3
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%retval = alloca i16, align 2
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%i.addr = alloca i16, align 2
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store i16 %i, i16* %i.addr, align 2
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%0 = load i16, i16* %i.addr, align 2
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; CHECK: add r12, r12
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; CHECK-NEXT: br .LJTI0_0(r12)
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switch i16 %0, label %sw.default [
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i16 0, label %sw.bb
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i16 1, label %sw.bb1
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i16 2, label %sw.bb2
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i16 3, label %sw.bb3
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]
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sw.bb: ; preds = %entry
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store i16 0, i16* %retval
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br label %return
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sw.bb1: ; preds = %entry
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store i16 1, i16* %retval
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br label %return
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sw.bb2: ; preds = %entry
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store i16 2, i16* %retval
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br label %return
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sw.bb3: ; preds = %entry
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store i16 3, i16* %retval
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br label %return
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sw.default: ; preds = %entry
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store i16 2, i16* %retval
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br label %return
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return: ; preds = %sw.default, %sw.bb3, %sw.bb2, %sw.bb1, %sw.bb
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%1 = load i16, i16* %retval
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ret i16 %1
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; CHECK: ret
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}
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; CHECK: .LJTI0_0:
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; CHECK-NEXT: .short .LBB0_2
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; CHECK-NEXT: .short .LBB0_4
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; CHECK-NEXT: .short .LBB0_3
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; CHECK-NEXT: .short .LBB0_5
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