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9a256300f8
Instead of emitting config values in a predefined order, the code emitter will now emit a 32-bit register index followed by the 32-bit config value. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179546 91177308-0d34-0410-b5e6-96231b3b80d8
23 lines
1000 B
C++
23 lines
1000 B
C++
//===-- SIDefines.h - SI Helper Macros ----------------------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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/// \file
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//===----------------------------------------------------------------------===//
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#ifndef SIDEFINES_H_
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#define SIDEFINES_H_
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#define R_00B028_SPI_SHADER_PGM_RSRC1_PS 0x00B028
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#define R_00B128_SPI_SHADER_PGM_RSRC1_VS 0x00B128
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#define R_00B228_SPI_SHADER_PGM_RSRC1_GS 0x00B228
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#define R_00B848_COMPUTE_PGM_RSRC1 0x00B848
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#define S_00B028_VGPRS(x) (((x) & 0x3F) << 0)
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#define S_00B028_SGPRS(x) (((x) & 0x0F) << 6)
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#define R_0286CC_SPI_PS_INPUT_ENA 0x0286CC
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#endif // SIDEFINES_H_
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