llvm/utils/TableGen at 46cd4ae5856cb9ce24deb2dfd1e9f4fb880c8a51 - llvm

AsmMatcherEmitter.cpp

[TableGen] Make TiedAsmOperandTable in the AsmMatcher 'static' since its at file scope.

2018-06-18 16:17:46 +00:00

AsmWriterEmitter.cpp

[TableGen] Prevent double flattening of InstAlias asm strings in the asm matcher emitter.

2018-06-18 01:28:01 +00:00

AsmWriterInst.cpp

[TableGen] Remove the CGIOpNo from AsmWriterOperand as its not used for anything. NFC

2016-01-22 05:59:37 +00:00

AsmWriterInst.h

[TableGen] Reorder fields in AsmWriterOperand to remove padding and reduce size. NFC

2016-01-22 05:59:40 +00:00

Attributes.cpp

Remove redundant includes from utils/TableGen.

2017-12-13 21:31:13 +00:00

CallingConvEmitter.cpp

[TableGen] Simplify CallingConvEmitter.cpp. NFC.

2017-10-16 14:52:26 +00:00

CMakeLists.txt

[RFC][Patch 1/3] Add a new class of predicates for variant scheduling classes.

2018-05-25 15:55:37 +00:00

CodeEmitterGen.cpp

[tablegen] Avoid creating a temporary vector in getInstructionCase

2017-07-04 06:16:53 +00:00

CodeGenDAGPatterns.cpp

[globalisel][tablegen] Add support for C++ predicates on PatFrags and use it to support BFC on ARM.

2018-06-15 23:13:43 +00:00

CodeGenDAGPatterns.h

[globalisel][tablegen] Add support for C++ predicates on PatFrags and use it to support BFC on ARM.

2018-06-15 23:13:43 +00:00

CodeGenHwModes.cpp

TableGen support for parameterized register class information

2017-09-14 16:56:21 +00:00

CodeGenHwModes.h

TableGen support for parameterized register class information

2017-09-14 16:56:21 +00:00

CodeGenInstruction.cpp

[TableGen][AsmMatcherEmitter] Allow tied operands of different classes in aliases.

2018-06-18 13:39:29 +00:00

CodeGenInstruction.h

[TableGen] Prevent double flattening of InstAlias asm strings in the asm matcher emitter.

2018-06-18 01:28:01 +00:00

CodeGenIntrinsics.h

Fix layering of MachineValueType.h by moving it from CodeGen to Support

2018-03-23 23:58:25 +00:00

CodeGenMapTable.cpp

[mips] Improve diagnostics for instruction mapping

2018-01-08 16:25:40 +00:00

CodeGenRegisters.cpp

[tablegen] Improve performance on *GenRegisterInfo.inc by replacing SparseVector with BitVector. NFC

2018-06-08 23:12:29 +00:00

CodeGenRegisters.h

[TableGen] Fix leaking synthesized registers.

2018-05-29 16:55:06 +00:00

CodeGenSchedule.cpp

[GlobalISel][Tablegen] Assign small opcodes to pseudos

2018-05-23 22:10:21 +00:00

CodeGenSchedule.h

[Tablegen] Simplify code in CodeGenSchedule. NFCI

2018-04-26 12:56:26 +00:00

CodeGenTarget.cpp

[GlobalISel][Tablegen] Assign small opcodes to pseudos

2018-05-23 22:10:21 +00:00

CodeGenTarget.h

[GlobalISel][Tablegen] Assign small opcodes to pseudos

2018-05-23 22:10:21 +00:00

CTagsEmitter.cpp

[TableGen] Change std::sort to llvm::sort in response to r327219

2018-04-06 20:18:05 +00:00

DAGISelEmitter.cpp

Revert r334764, as it breaks some bots

2018-06-14 20:32:58 +00:00

DAGISelMatcher.cpp

Remove redundant includes from utils/TableGen.

2017-12-13 21:31:13 +00:00

DAGISelMatcher.h

Fix layering of MachineValueType.h by moving it from CodeGen to Support

2018-03-23 23:58:25 +00:00

DAGISelMatcherEmitter.cpp

[SelectionDAG] Add a isel matcher op to check the type of node results other than result 0.

2017-11-22 07:11:01 +00:00

DAGISelMatcherGen.cpp

Revert r334764, as it breaks some bots

2018-06-14 20:32:58 +00:00

DAGISelMatcherOpt.cpp

Rename DEBUG macro to LLVM_DEBUG.

2018-05-14 12:53:11 +00:00

DFAPacketizerEmitter.cpp

Rename DEBUG macro to LLVM_DEBUG.

2018-05-14 12:53:11 +00:00

DisassemblerEmitter.cpp

[WebAssembly] Initial Disassembler.

2018-05-10 22:16:44 +00:00

FastISelEmitter.cpp

Revert r334764, as it breaks some bots

2018-06-14 20:32:58 +00:00

FixedLenDecoderEmitter.cpp

Rename DEBUG macro to LLVM_DEBUG.

2018-05-14 12:53:11 +00:00

GlobalISelEmitter.cpp

[globalisel][tablegen] Add support for C++ predicates on PatFrags and use it to support BFC on ARM.

2018-06-15 23:13:43 +00:00

InfoByHwMode.cpp

[TableGen] Change std::sort to llvm::sort in response to r327219

2018-04-06 20:18:05 +00:00

InfoByHwMode.h

Fix layering of MachineValueType.h by moving it from CodeGen to Support

2018-03-23 23:58:25 +00:00

InstrDocsEmitter.cpp

[Docs] Add tablegen backend for target opcode documentation

2017-11-14 15:35:15 +00:00

InstrInfoEmitter.cpp

[RFC][Patch 2/3] Add a MCSubtargetInfo hook to resolve variant scheduling classes.

2018-05-25 16:02:43 +00:00

IntrinsicEmitter.cpp

NFC - Typo fixes lib/VMCore -> lib/IR

2018-04-30 10:18:11 +00:00

LLVMBuild.txt

Add missing dependency (headers are included from MC, so a link dependency could exist easily enough)

2018-03-29 00:29:43 +00:00

OptParserEmitter.cpp

[Bash-autocompletion] Add support for -std=

2017-08-29 02:01:56 +00:00

PredicateExpander.cpp

[RFC][Patch 1/3] Add a new class of predicates for variant scheduling classes.

2018-05-25 15:55:37 +00:00

PredicateExpander.h

[RFC][Patch 1/3] Add a new class of predicates for variant scheduling classes.

2018-05-25 15:55:37 +00:00

PseudoLoweringEmitter.cpp

Rename DEBUG macro to LLVM_DEBUG.

2018-05-14 12:53:11 +00:00

RegisterBankEmitter.cpp

Rename DEBUG macro to LLVM_DEBUG.

2018-05-14 12:53:11 +00:00

RegisterInfoEmitter.cpp

[TableGen] Change std::sort to llvm::sort in response to r327219

2018-04-06 20:18:05 +00:00

RISCVCompressInstEmitter.cpp

Rename DEBUG macro to LLVM_DEBUG.

2018-05-14 12:53:11 +00:00

SDNodeProperties.cpp

TableGen: Allow setting SDNodeProperties on intrinsics

2017-12-20 19:36:28 +00:00

SDNodeProperties.h

TableGen: Allow setting SDNodeProperties on intrinsics

2017-12-20 19:36:28 +00:00

SearchableTableEmitter.cpp

TableGen: Support Intrinsic values in SearchableTable

2018-04-01 17:08:58 +00:00

SequenceToOffsetTable.h

Remove usages of deprecated std::unary_function and std::binary_function.

2017-09-14 18:33:25 +00:00

SubtargetEmitter.cpp

[TableGen] Emit a fatal error on inconsistencies in resource units vs cycles.

2018-06-13 09:41:49 +00:00

SubtargetFeatureInfo.cpp

IWYU for llvm-config.h in llvm, additions.

2018-04-30 14:59:11 +00:00

SubtargetFeatureInfo.h

Remove \brief commands from doxygen comments.

2018-05-01 15:54:18 +00:00

TableGen.cpp

[RISCV] Tablegen-driven Instruction Compression.

2018-04-06 21:07:05 +00:00

TableGenBackends.h

[RISCV] Tablegen-driven Instruction Compression.

2018-04-06 21:07:05 +00:00

tdtags

Add TableGen ctags(1) emitter and helper script.

2013-03-21 23:40:38 +00:00

Types.cpp

[globalisel][tablegen] Import SelectionDAG's rule predicates and support the equivalent in GIRule.

2017-04-21 15:59:56 +00:00

Types.h

Check that emitted instructions meet their predicates on all targets except ARM, Mips, and X86.

2016-11-19 13:05:44 +00:00

WebAssemblyDisassemblerEmitter.cpp

[WebAssembly] Initial Disassembler.

2018-05-10 22:16:44 +00:00

WebAssemblyDisassemblerEmitter.h

[WebAssembly] Initial Disassembler.

2018-05-10 22:16:44 +00:00

X86DisassemblerShared.h

[X86] Use unique_ptr to simplify memory management. NFC

2018-03-24 07:15:47 +00:00

X86DisassemblerTables.cpp

[X86] Remove DATA32_PREFIX. Hack the printing for DATA16_PREFIX to print 'data32' in 16-bit mode. Hack the asm parser to convert 'data32' to 'data16' in 16-bit mode.

2018-04-22 00:52:02 +00:00

X86DisassemblerTables.h

[X86] Add a new disassembler opcode map for 3DNow. Stop treating 3DNow as an attribute.

2018-03-24 07:48:54 +00:00

X86EVEX2VEXTablesEmitter.cpp

[X86] Add 'Z' to the internal names of various EVEX instructions for overall consistency.

2018-06-15 04:42:54 +00:00

X86FoldTablesEmitter.cpp

[X86] More additions to the load folding tables based on the autogenerated tables.

2018-06-16 23:25:50 +00:00

X86ModRMFilters.cpp

Second attempt at Removing special form of AddRegFrm used by FP instructions. These instructions can be handled by MRMXr instead.

2014-01-01 14:22:37 +00:00

X86ModRMFilters.h

fix trivial typos in comments; NFC

2017-07-04 13:09:29 +00:00

X86RecognizableInstr.cpp

[X86] Rename vy512mem->vy512xmem and vz256xmem->vz256mem.

2018-06-06 19:15:12 +00:00

X86RecognizableInstr.h

Remove \brief commands from doxygen comments.

2018-05-01 15:54:18 +00:00