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0e277d18bb
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206876 91177308-0d34-0410-b5e6-96231b3b80d8
115 lines
3.8 KiB
LLVM
115 lines
3.8 KiB
LLVM
; RUN: llc -mtriple=aarch64-none-linux-gnu -mattr=+neon < %s | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-AARCH64
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; RUN: llc -mtriple=arm64-none-linux-gnu -mattr=+neon < %s | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-ARM64
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define float @test_dup_sv2S(<2 x float> %v) {
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; CHECK-LABEL: test_dup_sv2S
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; CHECK-AARCH64: dup {{s[0-9]+}}, {{v[0-9]+}}.s[1]
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; CHECK-ARM64: ins {{v[0-9]+}}.s[0], {{v[0-9]+}}.s[1]
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%tmp1 = extractelement <2 x float> %v, i32 1
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ret float %tmp1
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}
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define float @test_dup_sv2S_0(<2 x float> %v) {
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; CHECK-LABEL: test_dup_sv2S_0
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; CHECK-NOT: dup {{[vsd][0-9]+}}
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; CHECK-NOT: ins {{[vsd][0-9]+}}
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; CHECK: ret
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%tmp1 = extractelement <2 x float> %v, i32 0
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ret float %tmp1
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}
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define float @test_dup_sv4S(<4 x float> %v) {
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; CHECK-LABEL: test_dup_sv4S
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; CHECK-NOT: dup {{[vsd][0-9]+}}
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; CHECK-NOT: ins {{[vsd][0-9]+}}
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; CHECK: ret
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%tmp1 = extractelement <4 x float> %v, i32 0
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ret float %tmp1
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}
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define double @test_dup_dvD(<1 x double> %v) {
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; CHECK-LABEL: test_dup_dvD
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; CHECK-NOT: dup {{[vsd][0-9]+}}
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; CHECK-NOT: ins {{[vsd][0-9]+}}
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; CHECK: ret
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%tmp1 = extractelement <1 x double> %v, i32 0
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ret double %tmp1
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}
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define double @test_dup_dv2D(<2 x double> %v) {
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; CHECK-LABEL: test_dup_dv2D
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; CHECK-AARCH64: dup {{d[0-9]+}}, {{v[0-9]+}}.d[1]
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; CHECK-ARM64: ins {{v[0-9]+}}.d[0], {{v[0-9]+}}.d[1]
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%tmp1 = extractelement <2 x double> %v, i32 1
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ret double %tmp1
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}
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define double @test_dup_dv2D_0(<2 x double> %v) {
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; CHECK-LABEL: test_dup_dv2D_0
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; CHECK-AARCH64: dup {{d[0-9]+}}, {{v[0-9]+}}.d[1]
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; CHECK-ARM64: ins {{v[0-9]+}}.d[0], {{v[0-9]+}}.d[1]
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; CHECK: ret
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%tmp1 = extractelement <2 x double> %v, i32 1
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ret double %tmp1
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}
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define <1 x i8> @test_vector_dup_bv16B(<16 x i8> %v1) {
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; CHECK-LABEL: test_vector_dup_bv16B
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; CHECK-AARCH64: dup {{b[0-9]+}}, {{v[0-9]+}}.b[14]
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%shuffle.i = shufflevector <16 x i8> %v1, <16 x i8> undef, <1 x i32> <i32 14>
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ret <1 x i8> %shuffle.i
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}
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define <1 x i8> @test_vector_dup_bv8B(<8 x i8> %v1) {
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; CHECK-LABEL: test_vector_dup_bv8B
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; CHECK-AARCH64: dup {{b[0-9]+}}, {{v[0-9]+}}.b[7]
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%shuffle.i = shufflevector <8 x i8> %v1, <8 x i8> undef, <1 x i32> <i32 7>
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ret <1 x i8> %shuffle.i
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}
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define <1 x i16> @test_vector_dup_hv8H(<8 x i16> %v1) {
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; CHECK-LABEL: test_vector_dup_hv8H
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; CHECK-AARCH64: dup {{h[0-9]+}}, {{v[0-9]+}}.h[7]
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%shuffle.i = shufflevector <8 x i16> %v1, <8 x i16> undef, <1 x i32> <i32 7>
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ret <1 x i16> %shuffle.i
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}
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define <1 x i16> @test_vector_dup_hv4H(<4 x i16> %v1) {
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; CHECK-LABEL: test_vector_dup_hv4H
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; CHECK-AARCH64: dup {{h[0-9]+}}, {{v[0-9]+}}.h[3]
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%shuffle.i = shufflevector <4 x i16> %v1, <4 x i16> undef, <1 x i32> <i32 3>
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ret <1 x i16> %shuffle.i
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}
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define <1 x i32> @test_vector_dup_sv4S(<4 x i32> %v1) {
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; CHECK-LABEL: test_vector_dup_sv4S
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; CHECK-AARCH64: dup {{s[0-9]+}}, {{v[0-9]+}}.s[3]
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%shuffle = shufflevector <4 x i32> %v1, <4 x i32> undef, <1 x i32> <i32 3>
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ret <1 x i32> %shuffle
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}
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define <1 x i32> @test_vector_dup_sv2S(<2 x i32> %v1) {
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; CHECK-LABEL: test_vector_dup_sv2S
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; CHECK-AARCH64: dup {{s[0-9]+}}, {{v[0-9]+}}.s[1]
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%shuffle = shufflevector <2 x i32> %v1, <2 x i32> undef, <1 x i32> <i32 1>
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ret <1 x i32> %shuffle
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}
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define <1 x i64> @test_vector_dup_dv2D(<2 x i64> %v1) {
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; CHECK-LABEL: test_vector_dup_dv2D
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; CHECK-AARCH64: dup {{d[0-9]+}}, {{v[0-9]+}}.d[1]
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; CHECK-ARM64: ext {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, #8
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%shuffle.i = shufflevector <2 x i64> %v1, <2 x i64> undef, <1 x i32> <i32 1>
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ret <1 x i64> %shuffle.i
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}
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define <1 x i64> @test_vector_copy_dup_dv2D(<1 x i64> %a, <2 x i64> %c) {
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; CHECK-LABEL: test_vector_copy_dup_dv2D
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; CHECK: {{dup|mov}} {{d[0-9]+}}, {{v[0-9]+}}.d[1]
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%vget_lane = extractelement <2 x i64> %c, i32 1
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%vset_lane = insertelement <1 x i64> undef, i64 %vget_lane, i32 0
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ret <1 x i64> %vset_lane
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}
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