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4c8fe28374
Reinteroduce the code for moving ARGUMENTS back to the top of the basic block. While the ARGUMENTS physical register prevents sinking and scheduling from moving them, it does not appear to be sufficient to prevent SelectionDAG from moving them down in the initial schedule. This patch introduces a patch that moves them back to the top immediately after SelectionDAG runs. This is still hopefully a temporary solution. http://reviews.llvm.org/D14750 is one alternative, though the review has not been favorable, and proposed alternatives are longer-term and have other downsides. This fixes the main outstanding -verify-machineinstrs failures, so it adds -verify-machineinstrs to several tests. Differential Revision: http://reviews.llvm.org/D15377 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255125 91177308-0d34-0410-b5e6-96231b3b80d8
89 lines
2.4 KiB
LLVM
89 lines
2.4 KiB
LLVM
; RUN: llc < %s -asm-verbose=false -verify-machineinstrs | FileCheck %s
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; Test the register stackifier pass.
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target datalayout = "e-p:32:32-i64:64-n32:64-S128"
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target triple = "wasm32-unknown-unknown"
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; No because of pointer aliasing.
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; CHECK-LABEL: no0:
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; CHECK: return $1{{$}}
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define i32 @no0(i32* %p, i32* %q) {
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%t = load i32, i32* %q
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store i32 0, i32* %p
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ret i32 %t
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}
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; No because of side effects.
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; CHECK-LABEL: no1:
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; CHECK: return $1{{$}}
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define i32 @no1(i32* %p, i32* dereferenceable(4) %q) {
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%t = load volatile i32, i32* %q, !invariant.load !0
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store volatile i32 0, i32* %p
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ret i32 %t
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}
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; Yes because of invariant load and no side effects.
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; CHECK-LABEL: yes0:
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; CHECK: return $pop0{{$}}
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define i32 @yes0(i32* %p, i32* dereferenceable(4) %q) {
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%t = load i32, i32* %q, !invariant.load !0
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store i32 0, i32* %p
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ret i32 %t
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}
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; Yes because of no intervening side effects.
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; CHECK-LABEL: yes1:
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; CHECK: return $pop0{{$}}
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define i32 @yes1(i32* %q) {
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%t = load volatile i32, i32* %q
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ret i32 %t
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}
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; Don't schedule stack uses into the stack. To reduce register pressure, the
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; scheduler might be tempted to move the definition of $2 down. However, this
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; would risk getting incorrect liveness if the instructions are later
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; rearranged to make the stack contiguous.
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; CHECK-LABEL: stack_uses:
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; CHECK-NEXT: .param i32, i32, i32, i32{{$}}
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; CHECK-NEXT: .result i32{{$}}
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; CHECK-NEXT: .local i32, i32{{$}}
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; CHECK-NEXT: i32.const $4=, 1{{$}}
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; CHECK-NEXT: i32.const $5=, 2{{$}}
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; CHECK-NEXT: i32.lt_s $push0=, $0, $4{{$}}
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; CHECK-NEXT: i32.lt_s $push1=, $1, $5{{$}}
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; CHECK-NEXT: i32.xor $push4=, $pop0, $pop1{{$}}
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; CHECK-NEXT: i32.lt_s $push2=, $2, $4{{$}}
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; CHECK-NEXT: i32.lt_s $push3=, $3, $5{{$}}
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; CHECK-NEXT: i32.xor $push5=, $pop2, $pop3{{$}}
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; CHECK-NEXT: i32.xor $push6=, $pop4, $pop5{{$}}
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; CHECK-NEXT: i32.ne $push7=, $pop6, $4{{$}}
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; CHECK-NEXT: block BB4_2{{$}}
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; CHECK-NEXT: br_if $pop7, BB4_2{{$}}
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; CHECK-NEXT: i32.const $push8=, 0{{$}}
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; CHECK-NEXT: return $pop8{{$}}
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; CHECK-NEXT: BB4_2:
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; CHECK-NEXT: return $4{{$}}
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define i32 @stack_uses(i32 %x, i32 %y, i32 %z, i32 %w) {
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entry:
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%c = icmp sle i32 %x, 0
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%d = icmp sle i32 %y, 1
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%e = icmp sle i32 %z, 0
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%f = icmp sle i32 %w, 1
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%g = xor i1 %c, %d
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%h = xor i1 %e, %f
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%i = xor i1 %g, %h
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br i1 %i, label %true, label %false
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true:
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ret i32 0
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false:
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ret i32 1
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}
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!0 = !{}
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