llvm/docs/AMDGPU/gfx7_data_mimg_atomic_reg.rst
Dmitry Preobrazhensky 51120d77df [AMDGPU][MC][DOC] Updated AMD GPU assembler description
Stage 2: added detailed description of operands

See bug 36572: https://bugs.llvm.org/show_bug.cgi?id=36572

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349368 91177308-0d34-0410-b5e6-96231b3b80d8
2018-12-17 17:38:11 +00:00

27 lines
994 B
ReStructuredText

..
**************************************************
* *
* Automatically generated file, do not edit! *
* *
**************************************************
.. _amdgpu_synid7_data_mimg_atomic_reg:
vdata
===========================
Input data for an atomic instruction.
Optionally may serve as an output data:
* If :ref:`glc<amdgpu_synid_glc>` is specified, gets the memory value before the operation.
*Size:* depends on :ref:`dmask<amdgpu_synid_dmask>` and :ref:`tfe<amdgpu_synid_tfe>`:
* :ref:`dmask<amdgpu_synid_dmask>` may specify 1 data element for 32-bit-per-pixel surfaces or 2 data elements for 64-bit-per-pixel surfaces. Each data element occupies 1 dword.
* :ref:`tfe<amdgpu_synid_tfe>` adds 1 dword if specified.
Note. The surface data format is indicated in the image resource constant but not in the instruction.
*Operands:* :ref:`v<amdgpu_synid_v>`