mirror of
https://github.com/RPCS3/llvm.git
synced 2024-12-26 22:26:16 +00:00
4ffd89fa4d
I've tried to find main moudle headers where possible, but the TableGen stuff may warrant someone else looking at it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169251 91177308-0d34-0410-b5e6-96231b3b80d8
40 lines
1.2 KiB
C++
40 lines
1.2 KiB
C++
//===- X86DisassemblerShared.h - Emitter shared header ----------*- C++ -*-===//
|
|
//
|
|
// The LLVM Compiler Infrastructure
|
|
//
|
|
// This file is distributed under the University of Illinois Open Source
|
|
// License. See LICENSE.TXT for details.
|
|
//
|
|
//===----------------------------------------------------------------------===//
|
|
|
|
#ifndef X86DISASSEMBLERSHARED_H
|
|
#define X86DISASSEMBLERSHARED_H
|
|
|
|
#include <string.h>
|
|
#include <string>
|
|
|
|
#define INSTRUCTION_SPECIFIER_FIELDS \
|
|
struct OperandSpecifier operands[X86_MAX_OPERANDS]; \
|
|
bool filtered; \
|
|
InstructionContext insnContext; \
|
|
std::string name; \
|
|
\
|
|
InstructionSpecifier() { \
|
|
filtered = false; \
|
|
insnContext = IC; \
|
|
name = ""; \
|
|
modifierType = MODIFIER_NONE; \
|
|
modifierBase = 0; \
|
|
memset(operands, 0, sizeof(operands)); \
|
|
}
|
|
|
|
#define INSTRUCTION_IDS \
|
|
InstrUID instructionIDs[256];
|
|
|
|
#include "../../lib/Target/X86/Disassembler/X86DisassemblerDecoderCommon.h"
|
|
|
|
#undef INSTRUCTION_SPECIFIER_FIELDS
|
|
#undef INSTRUCTION_IDS
|
|
|
|
#endif
|