Konstantin Zhuravlyov d7b9b912dd [AMDGPU][NFC] Rename ReserveTrapVGPRs -> ReserveRegs ...

Differential Revision: http://reviews.llvm.org/D20081


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270594 91177308-0d34-0410-b5e6-96231b3b80d8

2016-05-24 18:37:18 +00:00

..

AArch64

[AArch64] Disable narrow load merge by default

2016-05-20 18:45:49 +00:00

AMDGPU

[AMDGPU][NFC] Rename ReserveTrapVGPRs -> ReserveRegs

2016-05-24 18:37:18 +00:00

ARM

[ARM, AArch64] Match additional patterns to ldN instructions

2016-05-19 21:39:00 +00:00

BPF

[BPF] Remove exit-on-error flag in test (PR27766)

2016-05-23 14:57:19 +00:00

Generic

llc: Rework -run-pass option

2016-05-10 01:32:44 +00:00

Hexagon

When looking for a spill slot in reg scavenger, find one that matches RC

2016-05-18 18:16:00 +00:00

Inputs

[PR27284] Reverse the ownership between DICompileUnit and DISubprogram.

2016-04-15 15:57:41 +00:00

Lanai

[lanai] Change reloc to use PIC_ by default and cleanup.

2016-05-20 21:41:53 +00:00

Mips

[mips][mips16] Fix ZERO is not a CPU16Regs register error from the machine verifier.

2016-05-19 10:42:14 +00:00

MIR

[llc] New diagnostic handler

2016-05-16 14:28:02 +00:00

MSP430

MSP430InstrInfo::loadRegFromStackSlot forgets to set register def.

2016-02-24 15:15:02 +00:00

NVPTX

[NVPTX] Fix sign/zero-extending ldg/ldu instruction selection

2016-05-02 18:12:02 +00:00

PowerPC

[PowerPC] Add a testcase for TCO on string rvo function

2016-05-20 22:42:01 +00:00

SPARC

[SPARC] Fix 8 and 16-bit atomic load and store.

2016-05-23 20:33:00 +00:00

SystemZ

[SystemZ] Fix register ordering for BinaryRRF instructions

2016-05-18 13:24:57 +00:00

Thumb

ARM: stop emitting blx instructions for most calls on MachO.

2016-05-10 19:17:47 +00:00

Thumb2

ARM: stop emitting blx instructions for most calls on MachO.

2016-05-10 19:17:47 +00:00

WebAssembly

[WebAssembly] Optimize away return instructions using fallthroughs.

2016-05-21 00:21:56 +00:00

WinEH

[PR27284] Reverse the ownership between DICompileUnit and DISubprogram.

2016-04-15 15:57:41 +00:00

X86

Rework/enhance stack coloring data flow analysis.

2016-05-24 13:23:44 +00:00

XCore

[PR27284] Reverse the ownership between DICompileUnit and DISubprogram.

2016-04-15 15:57:41 +00:00