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c5a81e8618
This patch adds support for struct return values to the MSP430 target backend. It also reverses the order of argument and return registers in the calling convention to bring it into closer alignment with the published EABI from TI. Patch by Andrew Wygle (awygle). Differential Revision: https://reviews.llvm.org/D29069 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296807 91177308-0d34-0410-b5e6-96231b3b80d8
167 lines
3.3 KiB
LLVM
167 lines
3.3 KiB
LLVM
; RUN: llc < %s -march=msp430 | FileCheck %s
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target datalayout = "e-p:16:16:16-i1:8:8-i8:8:8-i16:16:16-i32:16:32"
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target triple = "msp430-generic-generic"
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@foo8 = external global i8
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@bar8 = external global i8
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define i8 @bitbrr(i8 %a, i8 %b) nounwind {
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%t1 = and i8 %a, %b
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%t2 = icmp ne i8 %t1, 0
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%t3 = zext i1 %t2 to i8
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ret i8 %t3
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}
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; CHECK-LABEL: bitbrr:
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; CHECK: bit.b r13, r12
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define i8 @bitbri(i8 %a) nounwind {
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%t1 = and i8 %a, 15
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%t2 = icmp ne i8 %t1, 0
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%t3 = zext i1 %t2 to i8
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ret i8 %t3
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}
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; CHECK-LABEL: bitbri:
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; CHECK: bit.b #15, r12
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define i8 @bitbir(i8 %a) nounwind {
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%t1 = and i8 15, %a
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%t2 = icmp ne i8 %t1, 0
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%t3 = zext i1 %t2 to i8
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ret i8 %t3
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}
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; CHECK-LABEL: bitbir:
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; CHECK: bit.b #15, r12
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define i8 @bitbmi() nounwind {
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%t1 = load i8, i8* @foo8
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%t2 = and i8 %t1, 15
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%t3 = icmp ne i8 %t2, 0
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%t4 = zext i1 %t3 to i8
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ret i8 %t4
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}
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; CHECK-LABEL: bitbmi:
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; CHECK: bit.b #15, &foo8
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define i8 @bitbim() nounwind {
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%t1 = load i8, i8* @foo8
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%t2 = and i8 15, %t1
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%t3 = icmp ne i8 %t2, 0
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%t4 = zext i1 %t3 to i8
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ret i8 %t4
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}
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; CHECK-LABEL: bitbim:
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; CHECK: bit.b #15, &foo8
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define i8 @bitbrm(i8 %a) nounwind {
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%t1 = load i8, i8* @foo8
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%t2 = and i8 %a, %t1
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%t3 = icmp ne i8 %t2, 0
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%t4 = zext i1 %t3 to i8
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ret i8 %t4
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}
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; CHECK-LABEL: bitbrm:
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; CHECK: bit.b &foo8, r12
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define i8 @bitbmr(i8 %a) nounwind {
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%t1 = load i8, i8* @foo8
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%t2 = and i8 %t1, %a
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%t3 = icmp ne i8 %t2, 0
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%t4 = zext i1 %t3 to i8
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ret i8 %t4
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}
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; CHECK-LABEL: bitbmr:
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; CHECK: bit.b r12, &foo8
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define i8 @bitbmm() nounwind {
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%t1 = load i8, i8* @foo8
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%t2 = load i8, i8* @bar8
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%t3 = and i8 %t1, %t2
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%t4 = icmp ne i8 %t3, 0
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%t5 = zext i1 %t4 to i8
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ret i8 %t5
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}
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; CHECK-LABEL: bitbmm:
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; CHECK: bit.b &bar8, &foo8
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@foo16 = external global i16
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@bar16 = external global i16
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define i16 @bitwrr(i16 %a, i16 %b) nounwind {
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%t1 = and i16 %a, %b
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%t2 = icmp ne i16 %t1, 0
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%t3 = zext i1 %t2 to i16
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ret i16 %t3
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}
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; CHECK-LABEL: bitwrr:
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; CHECK: bit.w r13, r12
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define i16 @bitwri(i16 %a) nounwind {
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%t1 = and i16 %a, 4080
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%t2 = icmp ne i16 %t1, 0
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%t3 = zext i1 %t2 to i16
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ret i16 %t3
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}
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; CHECK-LABEL: bitwri:
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; CHECK: bit.w #4080, r12
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define i16 @bitwir(i16 %a) nounwind {
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%t1 = and i16 4080, %a
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%t2 = icmp ne i16 %t1, 0
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%t3 = zext i1 %t2 to i16
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ret i16 %t3
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}
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; CHECK-LABEL: bitwir:
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; CHECK: bit.w #4080, r12
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define i16 @bitwmi() nounwind {
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%t1 = load i16, i16* @foo16
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%t2 = and i16 %t1, 4080
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%t3 = icmp ne i16 %t2, 0
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%t4 = zext i1 %t3 to i16
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ret i16 %t4
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}
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; CHECK-LABEL: bitwmi:
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; CHECK: bit.w #4080, &foo16
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define i16 @bitwim() nounwind {
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%t1 = load i16, i16* @foo16
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%t2 = and i16 4080, %t1
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%t3 = icmp ne i16 %t2, 0
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%t4 = zext i1 %t3 to i16
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ret i16 %t4
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}
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; CHECK-LABEL: bitwim:
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; CHECK: bit.w #4080, &foo16
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define i16 @bitwrm(i16 %a) nounwind {
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%t1 = load i16, i16* @foo16
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%t2 = and i16 %a, %t1
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%t3 = icmp ne i16 %t2, 0
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%t4 = zext i1 %t3 to i16
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ret i16 %t4
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}
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; CHECK-LABEL: bitwrm:
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; CHECK: bit.w &foo16, r12
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define i16 @bitwmr(i16 %a) nounwind {
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%t1 = load i16, i16* @foo16
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%t2 = and i16 %t1, %a
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%t3 = icmp ne i16 %t2, 0
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%t4 = zext i1 %t3 to i16
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ret i16 %t4
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}
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; CHECK-LABEL: bitwmr:
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; CHECK: bit.w r12, &foo16
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define i16 @bitwmm() nounwind {
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%t1 = load i16, i16* @foo16
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%t2 = load i16, i16* @bar16
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%t3 = and i16 %t1, %t2
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%t4 = icmp ne i16 %t3, 0
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%t5 = zext i1 %t4 to i16
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ret i16 %t5
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}
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; CHECK-LABEL: bitwmm:
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; CHECK: bit.w &bar16, &foo16
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