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94ec1e3c4f
This patch corresponds to review: The newly added VSX D-Form (register + offset) memory ops target the upper half of the VSX register set. The existing ones target the lower half. In order to unify these and have the ability to target all the VSX registers using D-Form operations, this patch defines Pseudo-ops for the loads/stores which are expanded post-RA. The expansion then choses the correct opcode based on the register that was allocated for the operation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283212 91177308-0d34-0410-b5e6-96231b3b80d8
75 lines
2.0 KiB
LLVM
75 lines
2.0 KiB
LLVM
; RUN: llc -verify-machineinstrs -mcpu=pwr8 -mattr=+vsx \
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; RUN: -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s
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; RUN: llc -verify-machineinstrs -mcpu=pwr9 -mattr=-power9-vector \
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; RUN: -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s
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; RUN: llc -verify-machineinstrs -mcpu=pwr9 \
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; RUN: -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s \
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; RUN: --check-prefix=CHECK-P9 --implicit-check-not xxswapd
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define <2 x double> @testi0(<2 x double>* %p1, double* %p2) {
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%v = load <2 x double>, <2 x double>* %p1
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%s = load double, double* %p2
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%r = insertelement <2 x double> %v, double %s, i32 0
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ret <2 x double> %r
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; CHECK-LABEL: testi0
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; CHECK: lxvd2x 0, 0, 3
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; CHECK: lxsdx 1, 0, 4
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; CHECK: xxswapd 0, 0
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; CHECK: xxspltd 1, 1, 0
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; CHECK: xxpermdi 34, 0, 1, 1
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; CHECK-P9-LABEL: testi0
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; CHECK-P9: lfd [[REG1:[0-9]+]], 0(4)
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; CHECK-P9: lxvx [[REG2:[0-9]+]], 0, 3
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; CHECK-P9: xxspltd [[REG3:[0-9]+]], [[REG1]], 0
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; CHECK-P9: xxpermdi 34, [[REG2]], [[REG3]], 1
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}
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define <2 x double> @testi1(<2 x double>* %p1, double* %p2) {
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%v = load <2 x double>, <2 x double>* %p1
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%s = load double, double* %p2
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%r = insertelement <2 x double> %v, double %s, i32 1
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ret <2 x double> %r
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; CHECK-LABEL: testi1
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; CHECK: lxvd2x 0, 0, 3
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; CHECK: lxsdx 1, 0, 4
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; CHECK: xxswapd 0, 0
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; CHECK: xxspltd 1, 1, 0
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; CHECK: xxmrgld 34, 1, 0
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; CHECK-P9-LABEL: testi1
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; CHECK-P9: lfd [[REG1:[0-9]+]], 0(4)
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; CHECK-P9: lxvx [[REG2:[0-9]+]], 0, 3
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; CHECK-P9: xxspltd [[REG3:[0-9]+]], [[REG1]], 0
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; CHECK-P9: xxmrgld 34, [[REG3]], [[REG2]]
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}
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define double @teste0(<2 x double>* %p1) {
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%v = load <2 x double>, <2 x double>* %p1
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%r = extractelement <2 x double> %v, i32 0
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ret double %r
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; CHECK-LABEL: teste0
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; CHECK: lxvd2x 1, 0, 3
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; CHECK-P9-LABEL: teste0
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; CHECK-P9: lfd 1, 0(3)
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}
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define double @teste1(<2 x double>* %p1) {
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%v = load <2 x double>, <2 x double>* %p1
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%r = extractelement <2 x double> %v, i32 1
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ret double %r
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; CHECK-LABEL: teste1
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; CHECK: lxvd2x 0, 0, 3
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; CHECK: xxswapd 1, 0
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; CHECK-P9-LABEL: teste1
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; CHECK-P9: lfd 1, 8(3)
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}
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