llvm/X86 at 5074c86cc6800e6d9ee23f73feca901b9125b7a7 - llvm

RPCS3/llvm

mirror of https://github.com/RPCS3/llvm.git synced 2025-05-23 22:06:19 +00:00

History

Craig Topper 4b9bffa31e [X86] Clzero intrinsic and its addition under znver1

This patch does the following.

1. Adds an Intrinsic int_x86_clzero which works with __builtin_ia32_clzero
2. Identifies clzero feature using cpuid info. (Function:8000_0008, Checks if EBX[0]=1)
3. Adds the clzero feature under znver1 architecture.
4. The custom inserter is added in Lowering.
5. A testcase is added to check the intrinsic.
6. The clzero instruction is added to assembler test.

Patch by Ganesh Gopalasubramanian with a couple formatting tweaks, a disassembler test, and using update_llc_test.py from me.

Differential revision: https://reviews.llvm.org/D29385

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294558 91177308-0d34-0410-b5e6-96231b3b80d8

2017-02-09 04:27:34 +00:00

avx-512.txt

[AVX-512] Teach the disassembler about all of the EVEX gather and scatter instructions.

2017-01-16 05:44:33 +00:00

fp-stack.txt

[X86] Adding FFREEP instruction.

2017-01-27 18:02:53 +00:00

hex-immediates.txt

llvm-mc: Add option for prefering hex format disassembly.

2014-06-11 20:26:40 +00:00

intel-syntax-32.txt

[X86] Don't print 'dword ptr' or 'qword ptr' on the operand to some of the LEA variants in Intel syntax. The memory operand is inherently unsized.