mirror of
https://github.com/RPCS3/llvm.git
synced 2024-12-02 16:56:39 +00:00
f295ff3a3e
Summary of changes: - added description of GFX10; - added description of operands sccz, vccz, lds_direct, etc; - minor bugfixing and improvements. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365347 91177308-0d34-0410-b5e6-96231b3b80d8
23 lines
898 B
ReStructuredText
23 lines
898 B
ReStructuredText
..
|
|
**************************************************
|
|
* *
|
|
* Automatically generated file, do not edit! *
|
|
* *
|
|
**************************************************
|
|
|
|
.. _amdgpu_synid10_dst_mimg_regular_d16:
|
|
|
|
vdst
|
|
===========================
|
|
|
|
Image data to load by an image instruction.
|
|
|
|
*Size:* depends on :ref:`dmask<amdgpu_synid_dmask>`, :ref:`tfe<amdgpu_synid_tfe>` and :ref:`d16<amdgpu_synid_d16>`:
|
|
|
|
* :ref:`dmask<amdgpu_synid_dmask>` may specify from 1 to 4 data elements. Each data element occupies either 32 bits or 16 bits depending on :ref:`d16<amdgpu_synid_d16>`.
|
|
* :ref:`d16<amdgpu_synid_d16>` specifies that data elements in registers are packed; each value occupies 16 bits.
|
|
* :ref:`tfe<amdgpu_synid_tfe>` adds 1 dword if specified.
|
|
|
|
|
|
*Operands:* :ref:`v<amdgpu_synid_v>`
|