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51f72c5a3f
Patch by Jack Carter and Reed Kotler at Mips. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141936 91177308-0d34-0410-b5e6-96231b3b80d8
64 lines
2.3 KiB
C++
64 lines
2.3 KiB
C++
//===- MipsRelocations.h - Mips Code Relocations ---------------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===---------------------------------------------------------------------===//
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//
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// This file defines the Mips target-specific relocation types
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// (for relocation-model=static).
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//
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//===---------------------------------------------------------------------===//
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#ifndef MIPSRELOCATIONS_H_
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#define MIPSRELOCATIONS_H_
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#include "llvm/CodeGen/MachineRelocation.h"
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namespace llvm {
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namespace Mips{
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enum RelocationType {
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// reloc_mips_branch - pc relative relocation for branches. The lower 18
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// bits of the difference between the branch target and the branch
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// instruction, shifted right by 2.
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reloc_mips_branch = 1,
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// reloc_mips_hi - upper 16 bits of the address (modified by +1 if the
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// lower 16 bits of the address is negative).
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reloc_mips_hi = 2,
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// reloc_mips_lo - lower 16 bits of the address.
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reloc_mips_lo = 3,
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// reloc_mips_26 - lower 28 bits of the address, shifted right by 2.
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reloc_mips_26 = 4,
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// I am starting here with the rest of the relocations because
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// I have no idea if the above enumerations are assumed somewhere
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// else
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reloc_mips_16 = 6, // R_MIPS_16
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reloc_mips_32 = 7, // R_MIPS_32
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reloc_mips_rel32 = 8, // R_MIPS_REL32
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reloc_mips_gprel16 = 10, // R_MIPS_GPREL16
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reloc_mips_literal = 12, // R_MIPS_LITERAL
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reloc_mips_got16 = 13, // R_MIPS_GOT16
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reloc_mips_call16 = 15, // R_MIPS_CALL16
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reloc_mips_gprel32 = 17, // R_MIPS_GPREL32
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reloc_mips_shift5 = 18, // R_MIPS_SHIFT5
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reloc_mips_shift6 = 19, // R_MIPS_SHIFT6
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reloc_mips_64 = 20, // R_MIPS_64
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reloc_mips_tlsgd = 21, // R_MIPS_TLS_GD
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reloc_mips_gottprel = 22, // R_MIPS_TLS_GOTTPREL
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reloc_mips_tprel_hi = 23, // R_MIPS_TLS_TPREL_HI16
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reloc_mips_tprel_lo = 24, // R_MIPS_TLS_TPREL_LO16
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reloc_mips_branch_pcrel = 25, // This should become R_MIPS_PC16
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reloc_mips_pcrel = 26, // R_MIPS_PC16
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reloc_mips_j_jal = 27 // R_MIPS_26
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};
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}
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}
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#endif /* MIPSRELOCATIONS_H_ */
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