Juergen Ributzka 7516444a26 [FastISel][AArch64] Custom lower sdiv by power-of-2. ...

Emit an optimized instruction sequence for sdiv by power-of-2 depending on the
exact flag.

This fixes rdar://problem/18224511.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217986 91177308-0d34-0410-b5e6-96231b3b80d8

2014-09-17 21:55:55 +00:00

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Analysis

AVX-512: added cost for some AVX-512 instructions

2014-09-16 07:57:37 +00:00

Assembler

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Bindings

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Bitcode

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BugPoint

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CodeGen

[FastISel][AArch64] Custom lower sdiv by power-of-2.

2014-09-17 21:55:55 +00:00

DebugInfo

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ExecutionEngine

[MCJIT] Make sure we test ARM BR24 relocations with both internal and external

2014-09-11 22:43:36 +00:00

Feature

[AArch64] Update test case to pass with post-RA MI scheduler.

2014-09-13 03:23:23 +00:00

FileCheck

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Instrumentation

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Integer

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JitListener

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Linker

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LTO

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MC

Exclude known and bugzilled failures from UBSan bootstrap

2014-09-17 20:17:52 +00:00

Object

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Other

[lit] Parse all strings as UTF-8 rather than ASCII.

2014-09-12 16:46:05 +00:00

TableGen

[TableGen] Fully resolve class-instance values before defs in multiclasses

2014-09-16 17:14:13 +00:00

tools

[llvm-objdump] clean up test cases now that build bots are green

2014-09-17 21:53:07 +00:00

Transforms

[IndVarSimplify] Partially revert r217953 to see if this fixes the bots.

2014-09-17 16:35:09 +00:00

Unit

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Verifier

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YAMLParser

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.clang-format

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CMakeLists.txt

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lit.cfg

Exclude known and bugzilled failures from UBSan bootstrap

2014-09-17 20:17:52 +00:00

lit.site.cfg.in

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Makefile

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Makefile.tests

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TestRunner.sh

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