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551ccae044
Move include/Config and include/Support into include/llvm/Config, include/llvm/ADT and include/llvm/Support. From here on out, all LLVM public header files must be under include/llvm/. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16137 91177308-0d34-0410-b5e6-96231b3b80d8
516 lines
18 KiB
C++
516 lines
18 KiB
C++
//===-- PPC32AsmPrinter.cpp - Print machine instrs to PowerPC assembly ----===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by the LLVM research group and is distributed under
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// the University of Illinois Open Source License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains a printer that converts from our internal representation
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// of machine-dependent LLVM code to PowerPC assembly language. This printer is
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// the output mechanism used by `llc'.
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//
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// Documentation at http://developer.apple.com/documentation/DeveloperTools/
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// Reference/Assembler/ASMIntroduction/chapter_1_section_1.html
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//
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//===----------------------------------------------------------------------===//
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#define DEBUG_TYPE "asmprinter"
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#include "PowerPC.h"
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#include "PPC32TargetMachine.h"
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#include "llvm/Constants.h"
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#include "llvm/DerivedTypes.h"
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#include "llvm/Module.h"
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#include "llvm/Assembly/Writer.h"
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#include "llvm/CodeGen/AsmPrinter.h"
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#include "llvm/CodeGen/MachineConstantPool.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/CodeGen/ValueTypes.h"
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#include "llvm/Support/Mangler.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/ADT/Statistic.h"
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#include "llvm/ADT/StringExtras.h"
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#include <set>
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using namespace llvm;
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namespace {
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Statistic<> EmittedInsts("asm-printer", "Number of machine instrs printed");
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struct PPC32AsmPrinter : public AsmPrinter {
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std::set<std::string> FnStubs, GVStubs, LinkOnceStubs;
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std::set<std::string> Strings;
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PPC32AsmPrinter(std::ostream &O, TargetMachine &TM)
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: AsmPrinter(O, TM), LabelNumber(0) {
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CommentString = ";";
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GlobalPrefix = "_";
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ZeroDirective = "\t.space\t"; // ".space N" emits N zeros.
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Data64bitsDirective = 0; // we can't emit a 64-bit unit
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AlignmentIsInBytes = false; // Alignment is by power of 2.
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}
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/// Unique incrementer for label values for referencing Global values.
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///
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unsigned LabelNumber;
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virtual const char *getPassName() const {
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return "PPC32 Assembly Printer";
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}
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PPC32TargetMachine &getTM() {
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return static_cast<PPC32TargetMachine&>(TM);
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}
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/// printInstruction - This method is automatically generated by tablegen
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/// from the instruction set description. This method returns true if the
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/// machine instruction was sufficiently described to print it, otherwise it
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/// returns false.
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bool printInstruction(const MachineInstr *MI);
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void printMachineInstruction(const MachineInstr *MI);
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void printOp(const MachineOperand &MO, bool LoadAddrOp = false);
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void printImmOp(const MachineOperand &MO, unsigned ArgType);
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void printOperand(const MachineInstr *MI, unsigned OpNo, MVT::ValueType VT){
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const MachineOperand &MO = MI->getOperand(OpNo);
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if (MO.getType() == MachineOperand::MO_MachineRegister) {
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assert(MRegisterInfo::isPhysicalRegister(MO.getReg())&&"Not physreg??");
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O << LowercaseString(TM.getRegisterInfo()->get(MO.getReg()).Name);
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} else if (MO.isImmediate()) {
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O << MO.getImmedValue();
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} else {
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printOp(MO);
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}
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}
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void printU5ImmOperand(const MachineInstr *MI, unsigned OpNo,
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MVT::ValueType VT) {
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unsigned char value = MI->getOperand(OpNo).getImmedValue();
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assert(value <= 31 && "Invalid u5imm argument!");
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O << (unsigned int)value;
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}
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void printU6ImmOperand(const MachineInstr *MI, unsigned OpNo,
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MVT::ValueType VT) {
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unsigned char value = MI->getOperand(OpNo).getImmedValue();
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assert(value <= 63 && "Invalid u6imm argument!");
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O << (unsigned int)value;
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}
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void printU16ImmOperand(const MachineInstr *MI, unsigned OpNo,
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MVT::ValueType VT) {
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O << (unsigned short)MI->getOperand(OpNo).getImmedValue();
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}
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void printConstantPool(MachineConstantPool *MCP);
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bool runOnMachineFunction(MachineFunction &F);
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bool doFinalization(Module &M);
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};
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} // end of anonymous namespace
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/// createPPC32AsmPrinterPass - Returns a pass that prints the PPC
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/// assembly code for a MachineFunction to the given output stream,
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/// using the given target machine description. This should work
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/// regardless of whether the function is in SSA form or not.
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///
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FunctionPass *llvm::createPPC32AsmPrinter(std::ostream &o, TargetMachine &tm) {
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return new PPC32AsmPrinter(o, tm);
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}
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// Include the auto-generated portion of the assembly writer
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#include "PowerPCGenAsmWriter.inc"
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/// printConstantPool - Print to the current output stream assembly
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/// representations of the constants in the constant pool MCP. This is
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/// used to print out constants which have been "spilled to memory" by
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/// the code generator.
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///
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void PPC32AsmPrinter::printConstantPool(MachineConstantPool *MCP) {
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const std::vector<Constant*> &CP = MCP->getConstants();
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const TargetData &TD = TM.getTargetData();
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if (CP.empty()) return;
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for (unsigned i = 0, e = CP.size(); i != e; ++i) {
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O << "\t.const\n";
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emitAlignment(TD.getTypeAlignmentShift(CP[i]->getType()));
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O << ".CPI" << CurrentFnName << "_" << i << ":\t\t\t\t\t" << CommentString
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<< *CP[i] << "\n";
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emitGlobalConstant(CP[i]);
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}
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}
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/// runOnMachineFunction - This uses the printMachineInstruction()
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/// method to print assembly for each instruction.
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///
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bool PPC32AsmPrinter::runOnMachineFunction(MachineFunction &MF) {
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setupMachineFunction(MF);
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O << "\n\n";
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// Print out constants referenced by the function
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printConstantPool(MF.getConstantPool());
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// Print out labels for the function.
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O << "\t.text\n";
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emitAlignment(2);
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O << "\t.globl\t" << CurrentFnName << "\n";
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O << CurrentFnName << ":\n";
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// Print out code for the function.
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for (MachineFunction::const_iterator I = MF.begin(), E = MF.end();
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I != E; ++I) {
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// Print a label for the basic block.
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O << ".LBB" << CurrentFnName << "_" << I->getNumber() << ":\t"
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<< CommentString << " " << I->getBasicBlock()->getName() << "\n";
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for (MachineBasicBlock::const_iterator II = I->begin(), E = I->end();
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II != E; ++II) {
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// Print the assembly for the instruction.
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O << "\t";
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printMachineInstruction(II);
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}
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}
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++LabelNumber;
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// We didn't modify anything.
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return false;
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}
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void PPC32AsmPrinter::printOp(const MachineOperand &MO,
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bool LoadAddrOp /* = false */) {
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const MRegisterInfo &RI = *TM.getRegisterInfo();
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int new_symbol;
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switch (MO.getType()) {
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case MachineOperand::MO_VirtualRegister:
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if (Value *V = MO.getVRegValueOrNull()) {
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O << "<" << V->getName() << ">";
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return;
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}
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// FALLTHROUGH
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case MachineOperand::MO_MachineRegister:
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case MachineOperand::MO_CCRegister:
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O << LowercaseString(RI.get(MO.getReg()).Name);
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return;
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case MachineOperand::MO_SignExtendedImmed:
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case MachineOperand::MO_UnextendedImmed:
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std::cerr << "printOp() does not handle immediate values\n";
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abort();
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return;
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case MachineOperand::MO_PCRelativeDisp:
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std::cerr << "Shouldn't use addPCDisp() when building PPC MachineInstrs";
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abort();
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return;
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case MachineOperand::MO_MachineBasicBlock: {
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MachineBasicBlock *MBBOp = MO.getMachineBasicBlock();
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O << ".LBB" << Mang->getValueName(MBBOp->getParent()->getFunction())
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<< "_" << MBBOp->getNumber() << "\t; "
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<< MBBOp->getBasicBlock()->getName();
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return;
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}
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case MachineOperand::MO_ConstantPoolIndex:
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O << ".CPI" << CurrentFnName << "_" << MO.getConstantPoolIndex();
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return;
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case MachineOperand::MO_ExternalSymbol:
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O << MO.getSymbolName();
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return;
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case MachineOperand::MO_GlobalAddress: {
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GlobalValue *GV = MO.getGlobal();
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std::string Name = Mang->getValueName(GV);
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// Dynamically-resolved functions need a stub for the function. Be
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// wary however not to output $stub for external functions whose addresses
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// are taken. Those should be emitted as $non_lazy_ptr below.
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Function *F = dyn_cast<Function>(GV);
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if (F && F->isExternal() && !LoadAddrOp &&
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getTM().CalledFunctions.count(F)) {
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FnStubs.insert(Name);
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O << "L" << Name << "$stub";
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return;
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}
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// External global variables need a non-lazily-resolved stub
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if (GV->isExternal() && getTM().AddressTaken.count(GV)) {
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GVStubs.insert(Name);
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O << "L" << Name << "$non_lazy_ptr";
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return;
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}
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if (F && LoadAddrOp && getTM().AddressTaken.count(GV)) {
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LinkOnceStubs.insert(Name);
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O << "L" << Name << "$non_lazy_ptr";
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return;
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}
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O << Mang->getValueName(GV);
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return;
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}
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default:
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O << "<unknown operand type: " << MO.getType() << ">";
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return;
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}
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}
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void PPC32AsmPrinter::printImmOp(const MachineOperand &MO, unsigned ArgType) {
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int Imm = MO.getImmedValue();
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if (ArgType == PPCII::Simm16 || ArgType == PPCII::Disimm16) {
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O << (short)Imm;
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} else {
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O << Imm;
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}
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}
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/// printMachineInstruction -- Print out a single PowerPC MI in Darwin syntax to
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/// the current output stream.
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///
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void PPC32AsmPrinter::printMachineInstruction(const MachineInstr *MI) {
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++EmittedInsts;
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if (printInstruction(MI))
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return; // Printer was automatically generated
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unsigned Opcode = MI->getOpcode();
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const TargetInstrInfo &TII = *TM.getInstrInfo();
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const TargetInstrDescriptor &Desc = TII.get(Opcode);
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unsigned i;
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unsigned ArgCount = MI->getNumOperands();
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unsigned ArgType[] = {
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(Desc.TSFlags >> PPCII::Arg0TypeShift) & PPCII::ArgTypeMask,
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(Desc.TSFlags >> PPCII::Arg1TypeShift) & PPCII::ArgTypeMask,
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(Desc.TSFlags >> PPCII::Arg2TypeShift) & PPCII::ArgTypeMask,
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(Desc.TSFlags >> PPCII::Arg3TypeShift) & PPCII::ArgTypeMask,
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(Desc.TSFlags >> PPCII::Arg4TypeShift) & PPCII::ArgTypeMask
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};
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assert(((Desc.TSFlags & PPCII::VMX) == 0) &&
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"Instruction requires VMX support");
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assert(((Desc.TSFlags & PPCII::PPC64) == 0) &&
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"Instruction requires 64 bit support");
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// CALLpcrel and CALLindirect are handled specially here to print only the
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// appropriate number of args that the assembler expects. This is because
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// may have many arguments appended to record the uses of registers that are
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// holding arguments to the called function.
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if (Opcode == PPC::COND_BRANCH) {
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std::cerr << "Error: untranslated conditional branch psuedo instruction!\n";
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abort();
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} else if (Opcode == PPC::IMPLICIT_DEF) {
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--EmittedInsts; // Not an actual machine instruction
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O << "; IMPLICIT DEF ";
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printOp(MI->getOperand(0));
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O << "\n";
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return;
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} else if (Opcode == PPC::CALLpcrel) {
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O << TII.getName(Opcode) << " ";
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printOp(MI->getOperand(0));
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O << "\n";
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return;
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} else if (Opcode == PPC::CALLindirect) {
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O << TII.getName(Opcode) << " ";
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printImmOp(MI->getOperand(0), ArgType[0]);
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O << ", ";
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printImmOp(MI->getOperand(1), ArgType[0]);
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O << "\n";
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return;
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} else if (Opcode == PPC::MovePCtoLR) {
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++EmittedInsts; // Actually two machine instructions
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// FIXME: should probably be converted to cout.width and cout.fill
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O << "bl \"L0000" << LabelNumber << "$pb\"\n";
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O << "\"L0000" << LabelNumber << "$pb\":\n";
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O << "\tmflr ";
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printOp(MI->getOperand(0));
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O << "\n";
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return;
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}
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O << TII.getName(Opcode) << " ";
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if (Opcode == PPC::LOADHiAddr) {
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printOp(MI->getOperand(0));
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O << ", ";
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if (MI->getOperand(1).getReg() == PPC::R0)
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O << "0";
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else
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printOp(MI->getOperand(1));
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O << ", ha16(" ;
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printOp(MI->getOperand(2), true /* LoadAddrOp */);
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O << "-\"L0000" << LabelNumber << "$pb\")\n";
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} else if (ArgCount == 3 && (MI->getOperand(2).isConstantPoolIndex()
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|| MI->getOperand(2).isGlobalAddress())) {
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printOp(MI->getOperand(0));
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O << ", lo16(";
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printOp(MI->getOperand(2), true /* LoadAddrOp */);
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O << "-\"L0000" << LabelNumber << "$pb\")";
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O << "(";
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if (MI->getOperand(1).getReg() == PPC::R0)
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O << "0";
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else
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printOp(MI->getOperand(1));
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O << ")\n";
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} else if (ArgCount == 3 && ArgType[1] == PPCII::Disimm16) {
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printOp(MI->getOperand(0));
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O << ", ";
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printImmOp(MI->getOperand(1), ArgType[1]);
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O << "(";
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if (MI->getOperand(2).hasAllocatedReg() &&
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MI->getOperand(2).getReg() == PPC::R0)
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O << "0";
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else
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printOp(MI->getOperand(2));
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O << ")\n";
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} else {
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for (i = 0; i < ArgCount; ++i) {
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// addi and friends
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if (i == 1 && ArgCount == 3 && ArgType[2] == PPCII::Simm16 &&
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MI->getOperand(1).hasAllocatedReg() &&
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MI->getOperand(1).getReg() == PPC::R0) {
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O << "0";
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// for long branch support, bc $+8
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} else if (i == 1 && ArgCount == 2 && MI->getOperand(1).isImmediate() &&
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TII.isBranch(MI->getOpcode())) {
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O << "$+8";
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assert(8 == MI->getOperand(i).getImmedValue()
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&& "branch off PC not to pc+8?");
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//printOp(MI->getOperand(i));
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} else if (MI->getOperand(i).isImmediate()) {
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printImmOp(MI->getOperand(i), ArgType[i]);
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} else {
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printOp(MI->getOperand(i));
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}
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if (ArgCount - 1 == i)
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O << "\n";
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else
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O << ", ";
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}
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}
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return;
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}
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// SwitchSection - Switch to the specified section of the executable if we are
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// not already in it!
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//
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static void SwitchSection(std::ostream &OS, std::string &CurSection,
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const char *NewSection) {
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if (CurSection != NewSection) {
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CurSection = NewSection;
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if (!CurSection.empty())
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OS << "\t" << NewSection << "\n";
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}
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}
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bool PPC32AsmPrinter::doFinalization(Module &M) {
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const TargetData &TD = TM.getTargetData();
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std::string CurSection;
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// Print out module-level global variables here.
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for (Module::const_giterator I = M.gbegin(), E = M.gend(); I != E; ++I)
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if (I->hasInitializer()) { // External global require no code
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O << "\n\n";
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std::string name = Mang->getValueName(I);
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Constant *C = I->getInitializer();
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unsigned Size = TD.getTypeSize(C->getType());
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unsigned Align = TD.getTypeAlignmentShift(C->getType());
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if (C->isNullValue() && /* FIXME: Verify correct */
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(I->hasInternalLinkage() || I->hasWeakLinkage())) {
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SwitchSection(O, CurSection, ".data");
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if (I->hasInternalLinkage())
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O << ".lcomm " << name << "," << TD.getTypeSize(C->getType())
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<< "," << Align;
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else
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O << ".comm " << name << "," << TD.getTypeSize(C->getType());
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O << "\t\t; ";
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WriteAsOperand(O, I, true, true, &M);
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O << "\n";
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} else {
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switch (I->getLinkage()) {
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case GlobalValue::LinkOnceLinkage:
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O << ".section __TEXT,__textcoal_nt,coalesced,no_toc\n"
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<< ".weak_definition " << name << '\n'
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<< ".private_extern " << name << '\n'
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<< ".section __DATA,__datacoal_nt,coalesced,no_toc\n";
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LinkOnceStubs.insert(name);
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break;
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case GlobalValue::WeakLinkage: // FIXME: Verify correct for weak.
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// Nonnull linkonce -> weak
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O << "\t.weak " << name << "\n";
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SwitchSection(O, CurSection, "");
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O << "\t.section\t.llvm.linkonce.d." << name << ",\"aw\",@progbits\n";
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break;
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case GlobalValue::AppendingLinkage:
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// FIXME: appending linkage variables should go into a section of
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// their name or something. For now, just emit them as external.
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case GlobalValue::ExternalLinkage:
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// If external or appending, declare as a global symbol
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O << "\t.globl " << name << "\n";
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// FALL THROUGH
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case GlobalValue::InternalLinkage:
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SwitchSection(O, CurSection, ".data");
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break;
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}
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emitAlignment(Align);
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O << name << ":\t\t\t\t; ";
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WriteAsOperand(O, I, true, true, &M);
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O << " = ";
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WriteAsOperand(O, C, false, false, &M);
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O << "\n";
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emitGlobalConstant(C);
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}
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}
|
|
|
|
// Output stubs for dynamically-linked functions
|
|
for (std::set<std::string>::iterator i = FnStubs.begin(), e = FnStubs.end();
|
|
i != e; ++i)
|
|
{
|
|
O << ".data\n";
|
|
O << ".section __TEXT,__picsymbolstub1,symbol_stubs,pure_instructions,32\n";
|
|
emitAlignment(2);
|
|
O << "L" << *i << "$stub:\n";
|
|
O << "\t.indirect_symbol " << *i << "\n";
|
|
O << "\tmflr r0\n";
|
|
O << "\tbcl 20,31,L0$" << *i << "\n";
|
|
O << "L0$" << *i << ":\n";
|
|
O << "\tmflr r11\n";
|
|
O << "\taddis r11,r11,ha16(L" << *i << "$lazy_ptr-L0$" << *i << ")\n";
|
|
O << "\tmtlr r0\n";
|
|
O << "\tlwzu r12,lo16(L" << *i << "$lazy_ptr-L0$" << *i << ")(r11)\n";
|
|
O << "\tmtctr r12\n";
|
|
O << "\tbctr\n";
|
|
O << ".data\n";
|
|
O << ".lazy_symbol_pointer\n";
|
|
O << "L" << *i << "$lazy_ptr:\n";
|
|
O << "\t.indirect_symbol " << *i << "\n";
|
|
O << "\t.long dyld_stub_binding_helper\n";
|
|
}
|
|
|
|
O << "\n";
|
|
|
|
// Output stubs for external global variables
|
|
if (GVStubs.begin() != GVStubs.end())
|
|
O << ".data\n.non_lazy_symbol_pointer\n";
|
|
for (std::set<std::string>::iterator i = GVStubs.begin(), e = GVStubs.end();
|
|
i != e; ++i) {
|
|
O << "L" << *i << "$non_lazy_ptr:\n";
|
|
O << "\t.indirect_symbol " << *i << "\n";
|
|
O << "\t.long\t0\n";
|
|
}
|
|
|
|
// Output stubs for link-once variables
|
|
if (LinkOnceStubs.begin() != LinkOnceStubs.end())
|
|
O << ".data\n.align 2\n";
|
|
for (std::set<std::string>::iterator i = LinkOnceStubs.begin(),
|
|
e = LinkOnceStubs.end(); i != e; ++i) {
|
|
O << "L" << *i << "$non_lazy_ptr:\n"
|
|
<< "\t.long\t" << *i << '\n';
|
|
}
|
|
|
|
AsmPrinter::doFinalization(M);
|
|
return false; // success
|
|
}
|