Matt Arsenault d380c14b7a AMDGPU: Allow SIShrinkInstructions to fold FrameIndexes ...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307576 91177308-0d34-0410-b5e6-96231b3b80d8

2017-07-10 20:04:35 +00:00

..

AArch64

[DAG] Improve Aliasing of operations to static alloca

2017-07-10 15:39:41 +00:00

AMDGPU

AMDGPU: Allow SIShrinkInstructions to fold FrameIndexes

2017-07-10 20:04:35 +00:00

ARM

[DAG] Improve Aliasing of operations to static alloca

2017-07-10 15:39:41 +00:00

AVR

[AVR] Fix test errors due to tied operands not matching

2017-07-09 16:36:35 +00:00

BPF

Rewrite areNonVolatileConsecutiveLoads to use BaseIndexOffset

2017-07-05 01:21:23 +00:00

Generic

Handle ConstantExpr correctly in SelectionDAGBuilder

2017-07-09 16:01:04 +00:00

Hexagon

[Hexagon] Fix check for HMOTF_ConstExtend operand flag

2017-07-10 18:38:52 +00:00

Inputs

[PR27284] Reverse the ownership between DICompileUnit and DISubprogram.

2016-04-15 15:57:41 +00:00

Lanai

CodeGen: Rename DEBUG_TYPE to match passnames

2017-05-25 21:26:32 +00:00

Mips

[DAG] Improve Aliasing of operations to static alloca

2017-07-10 15:39:41 +00:00

MIR

AMDGPU: Allow SIShrinkInstructions to work in non-SSA

2017-07-10 19:53:57 +00:00

MSP430

[DAG] Improve Aliasing of operations to static alloca

2017-07-10 15:39:41 +00:00

Nios2

[Nios2] Target registration

2017-05-29 09:48:30 +00:00

NVPTX

Extend memcpy expansion in Transform/Utils to handle wider operand types.

2017-07-07 02:00:06 +00:00

PowerPC

[PPC CodeGen] Expand the bitreverse.i64 intrinsic.

2017-07-10 18:11:23 +00:00

SPARC

[Solaris] emit .init_array instead of .ctors on Solaris (Sparc/x86)

2017-06-21 20:36:32 +00:00

SystemZ

[RegAllocFast] Don't insert kill flags of super-register for partial kill

2017-07-07 19:25:45 +00:00

Thumb

[NFC] Use stdin for some tests instead of positional argument.

2017-06-29 14:51:54 +00:00

Thumb2

[ARM] Improve if-conversion for M-class CPUs without branch predictors

2017-06-28 14:11:15 +00:00

WebAssembly

Fix libcall expansion creating DAG nodes with invalid type post type legalization.

2017-07-05 22:01:49 +00:00

WinEH

Avoid infinite loops in branch folding

2016-12-12 23:05:38 +00:00

X86

[X86] Model 256-bit AVX instructions in the AMD Jaguar scheduler Part-1 (PR28573).

2017-07-10 16:36:03 +00:00

XCore

[DAG] Improve Aliasing of operations to static alloca

2017-07-10 15:39:41 +00:00