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29f94c7201
This commit starts with a "git mv ARM64 AArch64" and continues out from there, renaming the C++ classes, intrinsics, and other target-local objects for consistency. "ARM64" test directories are also moved, and tests that began their life in ARM64 use an arm64 triple, those from AArch64 use an aarch64 triple. Both should be equivalent though. This finishes the AArch64 merge, and everyone should feel free to continue committing as normal now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209577 91177308-0d34-0410-b5e6-96231b3b80d8
41 lines
1006 B
LLVM
41 lines
1006 B
LLVM
; RUN: llc < %s -march=arm64
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; The target lowering for integer comparisons was replacing some DAG nodes
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; during operation legalization, which resulted in dangling pointers,
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; cycles in DAGs, and eventually crashes. This is the testcase for
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; one of those crashes. (rdar://10653656)
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define void @test(i1 zeroext %IsArrow) nounwind ssp align 2 {
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entry:
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br i1 undef, label %return, label %lor.lhs.false
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lor.lhs.false:
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br i1 undef, label %return, label %if.end
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if.end:
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%tmp.i = load i64* undef, align 8
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%and.i.i.i = and i64 %tmp.i, -16
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br i1 %IsArrow, label %if.else_crit_edge, label %if.end32
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if.else_crit_edge:
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br i1 undef, label %if.end32, label %return
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if.end32:
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%0 = icmp ult i32 undef, 3
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%1 = zext i64 %tmp.i to i320
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%.pn.v = select i1 %0, i320 128, i320 64
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%.pn = shl i320 %1, %.pn.v
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%ins346392 = or i320 %.pn, 0
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store i320 %ins346392, i320* undef, align 8
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br i1 undef, label %sw.bb.i.i, label %exit
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sw.bb.i.i:
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unreachable
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exit:
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unreachable
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return:
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ret void
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}
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