Evan Cheng 586f69a118 - Teach LSR to avoid changing cmp iv stride if it will create an immediate that ... cannot be folded into target cmp instruction. - Avoid a phase ordering issue where early cmp optimization would prevent the later count-to-zero optimization. - Add missing checks which could cause LSR to reuse stride that does not have users. - Fix a bug in count-to-zero optimization code which failed to find the pre-inc iv's phi node. - Remove, tighten, loosen some incorrect checks disable valid transformations. - Quite a bit of code clean up. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86969 91177308-0d34-0410-b5e6-96231b3b80d8		2009-11-12 07:35:05 +00:00
..
Alpha	Eliminate more uses of llvm-as and llvm-dis.	2009-09-09 00:09:15 +00:00
ARM	Use Unified Assembly Syntax for the ARM backend.	2009-11-09 00:11:35 +00:00
Blackfin	Move Blackfin intrinsics into the Target/Blackfin directory.	2009-10-15 18:50:52 +00:00
CBackend	Eliminate more uses of llvm-as and llvm-dis.	2009-09-09 00:09:15 +00:00
CellSPU	Revert the main portion of r31856. It was causing BranchFolding	2009-10-22 00:03:58 +00:00
CPP	fix PR5295 where the .ll parser didn't reject a function after a global	2009-10-25 23:22:50 +00:00
Generic	Fix PR5421 by APInt'izing switch lowering.	2009-11-07 07:50:34 +00:00
Mips	Eliminate more uses of llvm-as and llvm-dis.	2009-09-09 00:09:15 +00:00
MSP430	Add and-not (bic) patterns. Based heavily on patch by Brian Lucas!	2009-11-08 15:33:12 +00:00
PIC16	Re-apply 84180 with the fixed test case.	2009-10-15 19:26:25 +00:00
PowerPC	Fix test to work on every platform.	2009-11-11 01:44:22 +00:00
SPARC	Eliminate some redundant llvm-as calls.	2009-10-12 09:31:55 +00:00
SystemZ	Eliminate more uses of llvm-as and llvm-dis.	2009-09-09 00:09:15 +00:00
Thumb	Refactor code. Fix a potential missing check. Teach isIdentical() about tLDRpci_pic.	2009-11-07 04:04:34 +00:00
Thumb2	- Teach LSR to avoid changing cmp iv stride if it will create an immediate that	2009-11-12 07:35:05 +00:00
X86	Tail merge at any size when there are two potentials blocks and one	2009-11-12 00:39:10 +00:00
XCore	Add some peepholes for signed comparisons using ashr X, X, 32.	2009-10-08 15:38:17 +00:00