Simon Pilgrim 21d100aff8 [CostModel][X86] Add explicit vector select costs ...

Prior to SSE41 (and sometimes on AVX1), vector select has to be performed as a ((X & C)|(Y & ~C)) bit select.

Exposes a couple of issues with the min/max reduction costs (which only go down to SSE42 for some reason).

The increase pre-SSE41 selection costs also prevent a couple of tests from firing any longer, so I've either tweaked the target or added AVX tests as well to the existing SSE2 tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351685 91177308-0d34-0410-b5e6-96231b3b80d8

2019-01-20 13:55:01 +00:00

..

AArch64

Update GettingStarted guide to recommend that people use the new

2019-01-14 22:27:32 +00:00

AMDGPU

Fix vectorization of canonicalize

2018-09-17 13:24:30 +00:00

ARM

[SLP]Update test checks for the SPL vectorizer, NFC.

2019-01-11 20:21:14 +00:00

NVPTX

[SLP]Moved NVPTX test under NVPTX directory, NFC.

2019-01-11 20:42:48 +00:00

PowerPC

[SLP]Update test checks for the SPL vectorizer, NFC.

2019-01-11 20:21:14 +00:00

SystemZ

[SLPVectorizer] Add tests related to PR30787, NFCI.

2018-03-29 18:57:03 +00:00

X86

[CostModel][X86] Add explicit vector select costs

2019-01-20 13:55:01 +00:00

XCore

[SLP]Update test checks for the SPL vectorizer, NFC.

2019-01-11 20:21:14 +00:00

int_sideeffect.ll

[SLP]Update test checks for the SPL vectorizer, NFC.

2019-01-11 20:21:14 +00:00