Arnaud A. de Grandmaison de246de958 [PBQP] Teach PassConfig to tell if the default register allocator is used. ... This enables targets to adapt their pass pipeline to the register allocator in use. For example, with the AArch64 backend, using PBQP with the cortex-a57, the FPLoadBalancing pass is no longer necessary. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220321 91177308-0d34-0410-b5e6-96231b3b80d8		2014-10-21 20:47:22 +00:00
..
AArch64	[PBQP] Teach PassConfig to tell if the default register allocator is used.	2014-10-21 20:47:22 +00:00
ARM	ARM: rework Thumb1 frame index rewriting	2014-10-20 21:28:41 +00:00
CPP
Generic
Hexagon
Inputs
Mips	[mips] Account for endianess when expanding BuildPairF64/ExtractElementF64 nodes.	2014-10-16 15:41:51 +00:00
MSP430
NVPTX	[MachineSink] Use the real post dominator tree	2014-10-15 03:27:43 +00:00
PowerPC	[PowerPC] Avoid VSX FMA mutate when killed product reg = addend reg	2014-10-21 13:02:37 +00:00
R600	R600/SI: Add pattern for bswap	2014-10-21 16:25:08 +00:00
SPARC
SystemZ
Thumb	[Thumb] Fix crash in Thumb1RegisterInfo::rewriteFrameIndex	2014-10-20 11:00:18 +00:00
Thumb2	ARM: Fix a bug which was causing convergence failure in constant-island pass.	2014-10-17 01:31:47 +00:00
X86	Fix a bit of confusion about .set and produce more readable assembly.	2014-10-21 01:17:30 +00:00
XCore	Fix a bit of confusion about .set and produce more readable assembly.	2014-10-21 01:17:30 +00:00