llvm/test/CodeGen
Hal Finkel 5bb16fdbb3 Add definitions for the PPC a2q core marked as having QPX available
This is the first commit of a large series which will add support for the
QPX vector instruction set to the PowerPC backend. This instruction set is
used on the IBM Blue Gene/Q supercomputers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173973 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-30 21:17:42 +00:00
..
ARM Add a special ARM trap encoding for NaCl. 2013-01-30 16:30:19 +00:00
CPP
Generic For inline asm: 2013-01-11 18:12:39 +00:00
Hexagon Add indexed load/store instructions for offset validation check. 2013-01-17 18:42:37 +00:00
MBlaze
Mips [mips] Test case for r173862. 2013-01-30 00:28:15 +00:00
MSP430
NVPTX [NVPTX] Fix crash with unnamed struct arguments 2012-12-05 20:50:28 +00:00
PowerPC Add definitions for the PPC a2q core marked as having QPX available 2013-01-30 21:17:42 +00:00
R600 DAGCombiner: Avoid generating illegal vector INT_TO_FP nodes 2013-01-02 22:13:01 +00:00
SI Add R600 backend 2012-12-11 21:25:42 +00:00
SPARC
Thumb
Thumb2 FileCheck-ify some grep tests 2013-01-25 22:11:46 +00:00
X86 When the legalizer is splitting vector shifts, the result may not have the right shift amount type. 2013-01-27 11:19:11 +00:00
XCore