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5d09c2f25d
This commit modifies the way the machine basic blocks are serialized - now the
machine basic blocks are serialized using a custom syntax instead of relying on
YAML primitives. Instead of using YAML mappings to represent the individual
machine basic blocks in a machine function's body, the new syntax uses a single
YAML block scalar which contains all of the machine basic blocks and
instructions for that function.
This is an example of a function's body that uses the old syntax:
body:
- id: 0
name: entry
instructions:
- '%eax = MOV32r0 implicit-def %eflags'
- 'RETQ %eax'
...
The same body is now written like this:
body: |
bb.0.entry:
%eax = MOV32r0 implicit-def %eflags
RETQ %eax
...
This syntax change is motivated by the fact that the bundled machine
instructions didn't map that well to the old syntax which was using a single
YAML sequence to store all of the machine instructions in a block. The bundled
machine instructions internally use flags like BundledPred and BundledSucc to
determine the bundles, and serializing them as MI flags using the old syntax
would have had a negative impact on the readability and the ease of editing
for MIR files. The new syntax allows me to serialize the bundled machine
instructions using a block construct without relying on the internal flags,
for example:
BUNDLE implicit-def dead %itstate, implicit-def %s1 ... {
t2IT 1, 24, implicit-def %itstate
%s1 = VMOVS killed %s0, 1, killed %cpsr, implicit killed %itstate
}
This commit also converts the MIR testcases to the new syntax. I developed
a script that can convert from the old syntax to the new one. I will post the
script on the llvm-commits mailing list in the thread for this commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244982 91177308-0d34-0410-b5e6-96231b3b80d8
43 lines
1.5 KiB
YAML
43 lines
1.5 KiB
YAML
# RUN: llc -mtriple=x86_64-apple-darwin -stop-after branch-folder -start-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
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# This test verifies that the machine verifier won't report an error when
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# verifying the PATCHPOINT instruction.
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--- |
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define void @small_patchpoint_codegen(i64 %p1, i64 %p2, i64 %p3, i64 %p4) {
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entry:
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%result = tail call i64 (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.i64(i64 5, i32 5, i8* null, i32 2, i64 %p1, i64 %p2)
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ret void
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}
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declare i64 @llvm.experimental.patchpoint.i64(i64, i32, i8*, i32, ...)
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...
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---
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name: small_patchpoint_codegen
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tracksRegLiveness: true
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liveins:
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- { reg: '%rdi' }
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- { reg: '%rsi' }
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frameInfo:
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hasPatchPoint: true
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stackSize: 8
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adjustsStack: true
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hasCalls: true
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fixedStack:
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- { id: 0, type: spill-slot, offset: -16, size: 8, alignment: 16 }
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body: |
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bb.0.entry:
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liveins: %rdi, %rsi, %rbp
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frame-setup PUSH64r killed %rbp, implicit-def %rsp, implicit %rsp
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CFI_INSTRUCTION .cfi_def_cfa_offset 16
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CFI_INSTRUCTION .cfi_offset %rbp, -16
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%rbp = frame-setup MOV64rr %rsp
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CFI_INSTRUCTION .cfi_def_cfa_register %rbp
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; CHECK: PATCHPOINT 5, 5, 0, 2, 0, %rdi, %rsi, csr_64, implicit-def dead early-clobber %r11, implicit-def %rsp, implicit-def dead %rax
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PATCHPOINT 5, 5, 0, 2, 0, %rdi, %rsi, csr_64, implicit-def dead early-clobber %r11, implicit-def %rsp, implicit-def dead %rax
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%rbp = POP64r implicit-def %rsp, implicit %rsp
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RETQ
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...
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