mirror of
https://github.com/RPCS3/llvm.git
synced 2024-12-13 23:18:58 +00:00
afa4f41e9c
Presently, CodeGenPrepare deletes all nearly empty (only phi and branch) basic blocks. This pass can delete loop preheaders which frequently creates critical edges. A preheader can be a convenient place to spill registers to the stack. If the entrance to a loop body is a critical edge, then spills may occur in the loop body rather than immediately before it. This patch protects loop preheaders from deletion in CodeGenPrepare even if they are nearly empty. Since the patch alters the CFG, it affects a large number of test cases. In most cases, the changes are merely cosmetic (basic blocks have different names or instruction orders change slightly). I am somewhat concerned about the test/CodeGen/Mips/brdelayslot.ll test case. If the loop preheader is not deleted, then the MIPS backend does not take advantage of a branch delay slot. Consequently, I would like some close review by a MIPS expert. The patch also partially subsumes D16893 from George Burgess IV. George correctly notes that CodeGenPrepare does not actually preserve the dominator tree. I think the dominator tree was usually not valid when CodeGenPrepare ran, but I am using LoopInfo to mark preheaders, so the dominator tree is now always valid before CodeGenPrepare. Author: Tom Jablin (tjablin) Reviewers: hfinkel george.burgess.iv vkalintiris dsanders kbarton cycheng http://reviews.llvm.org/D16984 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265397 91177308-0d34-0410-b5e6-96231b3b80d8
46 lines
1.8 KiB
LLVM
46 lines
1.8 KiB
LLVM
; RUN: llc < %s -march=x86 -mtriple=i686-apple-darwin9.4.0 -disable-branch-fold | FileCheck %s
|
|
; PR2659
|
|
|
|
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
|
|
target triple = "i686-apple-darwin9.4.0"
|
|
|
|
define i32 @binomial(i32 %n, i32 %k) nounwind {
|
|
entry:
|
|
%cmp = icmp ugt i32 %k, %n ; <i1> [#uses=1]
|
|
br i1 %cmp, label %ifthen, label %forcond.preheader
|
|
|
|
forcond.preheader: ; preds = %entry
|
|
%cmp44 = icmp eq i32 %k, 0 ; <i1> [#uses=1]
|
|
br i1 %cmp44, label %afterfor, label %forbody
|
|
|
|
; CHECK: %forcond.preheader
|
|
; CHECK: movl $1
|
|
; CHECK-NOT: xorl
|
|
; CHECK-NOT: movl
|
|
; CHECK-NOT: LBB
|
|
; CHECK: je
|
|
|
|
; There should be no moves required in the for loop body.
|
|
; CHECK: %forbody{{$}}
|
|
; CHECK-NOT: mov
|
|
; CHECK: jbe
|
|
|
|
ifthen: ; preds = %entry
|
|
ret i32 0
|
|
|
|
forbody: ; preds = %forbody, %forcond.preheader
|
|
%indvar = phi i32 [ 0, %forcond.preheader ], [ %divisor.02, %forbody ] ; <i32> [#uses=3]
|
|
%accumulator.01 = phi i32 [ 1, %forcond.preheader ], [ %div, %forbody ] ; <i32> [#uses=1]
|
|
%divisor.02 = add i32 %indvar, 1 ; <i32> [#uses=2]
|
|
%n.addr.03 = sub i32 %n, %indvar ; <i32> [#uses=1]
|
|
%mul = mul i32 %n.addr.03, %accumulator.01 ; <i32> [#uses=1]
|
|
%div = udiv i32 %mul, %divisor.02 ; <i32> [#uses=2]
|
|
%inc = add i32 %indvar, 2 ; <i32> [#uses=1]
|
|
%cmp4 = icmp ugt i32 %inc, %k ; <i1> [#uses=1]
|
|
br i1 %cmp4, label %afterfor, label %forbody
|
|
|
|
afterfor: ; preds = %forbody, %forcond.preheader
|
|
%accumulator.0.lcssa = phi i32 [ 1, %forcond.preheader ], [ %div, %forbody ] ; <i32> [#uses=1]
|
|
ret i32 %accumulator.0.lcssa
|
|
}
|