llvm/lib at 5d6365c80c58b2f544eb1d927875d07f46e59a26 - llvm

RPCS3/llvm

mirror of https://github.com/RPCS3/llvm.git synced 2025-01-14 22:07:54 +00:00

History

Juergen Ributzka 5d6365c80c [FastISel][AArch64] Use the correct register class to make the MI verifier happy.

This is mostly achieved by providing the correct register class manually,
because getRegClassFor always returns the GPR*AllRegClass for MVT::i32 and
MVT::i64.

Also cleanup the code to use the FastEmitInst_* method whenever possible. This
makes sure that the operands' register class is properly constrained. For all
the remaining cases this adds the missing constrainOperandRegClass calls for
each operand.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216225 91177308-0d34-0410-b5e6-96231b3b80d8

2014-08-21 20:57:57 +00:00

Analysis

Repace SmallPtrSet with SmallPtrSetImpl in function arguments to avoid needing to mention the size.

2014-08-21 05:55:13 +00:00

AsmParser

Explicitly pass ownership of the MemoryBuffer to AddNewSourceBuffer using std::unique_ptr

2014-08-21 20:44:56 +00:00

Bitcode

BitcodeReader: Only create one basic block for each blockaddress

2014-08-16 01:54:37 +00:00

CodeGen

Explicitly pass ownership of the MemoryBuffer to AddNewSourceBuffer using std::unique_ptr