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3af13568fb
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216823 91177308-0d34-0410-b5e6-96231b3b80d8
111 lines
3.5 KiB
C++
111 lines
3.5 KiB
C++
//===-- SIFixSGPRLiveRanges.cpp - Fix SGPR live ranges ----------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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/// \file
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/// SALU instructions ignore control flow, so we need to modify the live ranges
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/// of the registers they define.
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///
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/// The strategy is to view the entire program as if it were a single basic
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/// block and calculate the intervals accordingly. We implement this
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/// by walking this list of segments for each LiveRange and setting the
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/// end of each segment equal to the start of the segment that immediately
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/// follows it.
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#include "AMDGPU.h"
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#include "SIRegisterInfo.h"
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#include "llvm/CodeGen/LiveIntervalAnalysis.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Target/TargetMachine.h"
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using namespace llvm;
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#define DEBUG_TYPE "si-fix-sgpr-live-ranges"
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namespace {
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class SIFixSGPRLiveRanges : public MachineFunctionPass {
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public:
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static char ID;
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public:
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SIFixSGPRLiveRanges() : MachineFunctionPass(ID) {
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initializeSIFixSGPRLiveRangesPass(*PassRegistry::getPassRegistry());
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}
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bool runOnMachineFunction(MachineFunction &MF) override;
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const char *getPassName() const override {
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return "SI Fix SGPR live ranges";
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}
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void getAnalysisUsage(AnalysisUsage &AU) const override {
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AU.addRequired<LiveIntervals>();
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AU.addPreserved<LiveIntervals>();
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AU.addPreserved<SlotIndexes>();
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AU.setPreservesCFG();
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MachineFunctionPass::getAnalysisUsage(AU);
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}
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};
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} // End anonymous namespace.
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INITIALIZE_PASS_BEGIN(SIFixSGPRLiveRanges, DEBUG_TYPE,
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"SI Fix SGPR Live Ranges", false, false)
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INITIALIZE_PASS_DEPENDENCY(LiveIntervals)
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INITIALIZE_PASS_END(SIFixSGPRLiveRanges, DEBUG_TYPE,
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"SI Fix SGPR Live Ranges", false, false)
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char SIFixSGPRLiveRanges::ID = 0;
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char &llvm::SIFixSGPRLiveRangesID = SIFixSGPRLiveRanges::ID;
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FunctionPass *llvm::createSIFixSGPRLiveRangesPass() {
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return new SIFixSGPRLiveRanges();
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}
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bool SIFixSGPRLiveRanges::runOnMachineFunction(MachineFunction &MF) {
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MachineRegisterInfo &MRI = MF.getRegInfo();
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const SIRegisterInfo *TRI =
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static_cast<const SIRegisterInfo *>(MF.getSubtarget().getRegisterInfo());
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LiveIntervals *LIS = &getAnalysis<LiveIntervals>();
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for (MachineFunction::iterator BI = MF.begin(), BE = MF.end();
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BI != BE; ++BI) {
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MachineBasicBlock &MBB = *BI;
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for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end();
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I != E; ++I) {
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MachineInstr &MI = *I;
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MachineOperand *ExecUse = MI.findRegisterUseOperand(AMDGPU::EXEC);
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if (ExecUse)
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continue;
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for (const MachineOperand &Def : MI.operands()) {
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if (!Def.isReg() || !Def.isDef() ||!TargetRegisterInfo::isVirtualRegister(Def.getReg()))
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continue;
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const TargetRegisterClass *RC = MRI.getRegClass(Def.getReg());
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if (!TRI->isSGPRClass(RC))
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continue;
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LiveInterval &LI = LIS->getInterval(Def.getReg());
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for (unsigned i = 0, e = LI.size() - 1; i != e; ++i) {
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LiveRange::Segment &Seg = LI.segments[i];
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LiveRange::Segment &Next = LI.segments[i + 1];
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Seg.end = Next.start;
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}
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}
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}
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}
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return false;
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}
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