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![Sanjay Patel](/assets/img/avatar_default.png)
As shown in: https://llvm.org/bugs/show_bug.cgi?id=23203 ...we currently die because lowering believes that mfence is allowed without SSE2 on x86-64, but the instruction def doesn't know that. I don't know if allowing mfence without SSE is right, but if not, at least now it's consistently wrong. :) Differential Revision: http://reviews.llvm.org/D17219 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260828 91177308-0d34-0410-b5e6-96231b3b80d8