mirror of
https://github.com/RPCS3/llvm.git
synced 2024-12-26 22:26:16 +00:00
53b0b0e754
Large code model is identical to medium code model except that the addis/addi sequence for "local" accesses is never used. All accesses use the addis/ld sequence. The coding changes are straightforward; most of the patch is taken up with creating variants of the medium model tests for large model. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175767 91177308-0d34-0410-b5e6-96231b3b80d8
27 lines
916 B
LLVM
27 lines
916 B
LLVM
; RUN: llc -mcpu=pwr7 -O0 -code-model=medium < %s | FileCheck %s
|
|
; RUN: llc -mcpu=pwr7 -O0 -code-model=large < %s | FileCheck %s
|
|
|
|
; Test correct code generation for medium and large code model
|
|
; for loading a function address.
|
|
|
|
target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"
|
|
target triple = "powerpc64-unknown-linux-gnu"
|
|
|
|
define i8* @test_fnaddr() nounwind {
|
|
entry:
|
|
%func = alloca i32 (i32)*, align 8
|
|
store i32 (i32)* @foo, i32 (i32)** %func, align 8
|
|
%0 = load i32 (i32)** %func, align 8
|
|
%1 = bitcast i32 (i32)* %0 to i8*
|
|
ret i8* %1
|
|
}
|
|
|
|
declare signext i32 @foo(i32 signext)
|
|
|
|
; CHECK: test_fnaddr:
|
|
; CHECK: addis [[REG1:[0-9]+]], 2, .LC[[TOCNUM:[0-9]+]]@toc@ha
|
|
; CHECK: ld [[REG2:[0-9]+]], .LC[[TOCNUM]]@toc@l([[REG1]])
|
|
; CHECK: .section .toc
|
|
; CHECK: .LC[[TOCNUM]]:
|
|
; CHECK: .tc {{[a-z0-9A-Z_.]+}}[TC],{{[a-z0-9A-Z_.]+}}
|