Tim Northover 604dff27c9 ARM64: add 128-bit MLA operations to the custom selection code. ... Without this change, the llvm_unreachable kicked in. The code pattern being spotted is rather non-canonical for 128-bit MLAs, but it can happen and there's no point in generating sub-optimal code for it just because it looks odd. Should fix PR19332. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205615 91177308-0d34-0410-b5e6-96231b3b80d8		2014-04-04 09:03:02 +00:00
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AArch64	[AArch64] Lower SHL_PARTS, SRA_PARTS and SRL_PARTS	2014-03-27 16:28:09 +00:00
ARM	ARM: yet another round of ARM test clean ups	2014-04-03 23:47:24 +00:00
ARM64	ARM64: add 128-bit MLA operations to the custom selection code.	2014-04-04 09:03:02 +00:00
CPP
Generic
Hexagon
Inputs
Mips	[mips] Add more Octeon cnMips instructions	2014-04-02 18:40:43 +00:00
MSP430	Mark FPB as a reserved register when needed.	2014-04-02 13:13:56 +00:00
NVPTX	Optimize away unnecessary address casts.	2014-04-03 21:18:25 +00:00
PowerPC	[PowerPC] Add some missing VSX bitcast patterns	2014-04-01 19:24:27 +00:00
R600	R600: Correct opcode for BFE_INT	2014-04-03 20:19:29 +00:00
SPARC
SystemZ	[SystemZ] Add support for z196 float<->unsigned conversions	2014-03-21 10:56:30 +00:00
Thumb	ARM: yet another round of ARM test clean ups	2014-04-03 23:47:24 +00:00
Thumb2	ARM: fix test case missed in previous roundup	2014-04-04 01:19:56 +00:00
X86	[RegAllocGreedy][Last Chance Recoloring] Emit diagnostics when last chance	2014-04-04 02:05:21 +00:00
XCore