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00e08fcaa0
Add header guards to files that were missing guards. Remove #endif comments as they don't seem common in LLVM (we can easily add them back if we decide they're useful) Changes made by clang-tidy with minor tweaks. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215558 91177308-0d34-0410-b5e6-96231b3b80d8
57 lines
1.9 KiB
C++
57 lines
1.9 KiB
C++
//===-- PPCRelocations.h - PPC Code Relocations -----------------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file defines the PowerPC 32-bit target-specific relocation types.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_POWERPC_PPCRELOCATIONS_H
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#define LLVM_LIB_TARGET_POWERPC_PPCRELOCATIONS_H
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#include "llvm/CodeGen/MachineRelocation.h"
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// Hack to rid us of a PPC pre-processor symbol which is erroneously
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// defined in a PowerPC header file (bug in Linux/PPC)
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#ifdef PPC
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#undef PPC
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#endif
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namespace llvm {
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namespace PPC {
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enum RelocationType {
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// reloc_vanilla - A standard relocation, where the address of the
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// relocated object completely overwrites the address of the relocation.
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reloc_vanilla,
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// reloc_pcrel_bx - PC relative relocation, for the b or bl instructions.
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reloc_pcrel_bx,
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// reloc_pcrel_bcx - PC relative relocation, for BLT,BLE,BEQ,BGE,BGT,BNE,
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// and other bcx instructions.
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reloc_pcrel_bcx,
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// reloc_absolute_high - Absolute relocation, for the loadhi instruction
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// (which is really addis). Add the high 16-bits of the specified global
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// address into the low 16-bits of the instruction.
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reloc_absolute_high,
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// reloc_absolute_low - Absolute relocation, for the la instruction (which
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// is really an addi). Add the low 16-bits of the specified global
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// address into the low 16-bits of the instruction.
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reloc_absolute_low,
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// reloc_absolute_low_ix - Absolute relocation for the 64-bit load/store
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// instruction which have two implicit zero bits.
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reloc_absolute_low_ix
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};
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}
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}
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#endif
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