Craig Topper 620b7d2fe1 [X86] Add a hack to combinePMULDQ to manually turn SIGN_EXTEND_VECTOR_INREG/ZERO_EXTEND_VECTOR_INREG inputs into an ANY_EXTEND_VECTOR_INREG style shuffle ...

ANY_EXTEND_VECTOR_INREG isn't currently marked Legal which prevents SimplifyDemandedBits from turning SIGN/ZERO_EXTEND_VECTOR_INREG into it after op legalization. And even if we did make it Legal, combineExtInVec doesn't do shuffle combining on the VECTOR_INREG nodes until AVX1.

This patch adds a quick hack to combinePMULDQ to directly emit a vector shuffle corresponding to an ANY_EXTEND_VECTOR_INREG operation. This avoids both of those issues without creating any other regressions on our tests. The xop-ifma.ll change here also showed up when I tried to resurrect D56306 and seemed to be the only improvement that patch creates now. This is a more direct way to get the benefit.

Differential Revision: https://reviews.llvm.org/D66436

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@369942 91177308-0d34-0410-b5e6-96231b3b80d8

2019-08-26 18:23:26 +00:00

..

AArch64

[NFC][Regalloc] Add testcases for D66576

2019-08-26 05:06:30 +00:00

AMDGPU

AMDGPU: Add baseline test for mul24 ordering issues

2019-08-24 22:22:38 +00:00

ARC

[lit] Delete empty lines at the end of lit.local.cfg NFC

2019-06-17 09:51:07 +00:00

ARM

[NFC][Regalloc] Add testcases for D66576

2019-08-26 05:06:30 +00:00

AVR

[AVR] Fix tests after r363757

2019-07-04 06:12:47 +00:00

BPF

[BPF] Fix bpf llvm-objdump issues.

2019-08-17 22:12:00 +00:00

Generic

[GlobalISel] Handle multiple registers in dbg.value intrinsic

2019-08-20 16:28:37 +00:00

Hexagon

[Hexagon] remove noise from tests; NFC

2019-08-25 18:34:07 +00:00

Inputs

[CodeGen] Add stack protector tests where the guard gets re-assigned

2019-07-17 20:46:16 +00:00

Lanai

[SDAG] commute setcc operands to match a subtract

2019-07-10 23:23:54 +00:00

Mips

GlobalISel: Don't create G_UADDE with constant false carry in

2019-08-22 17:29:17 +00:00

MIR

[DebugInfo] Allow bundled calls in the MIR's call site info

2019-08-19 12:41:22 +00:00

MSP430

[lit] Delete empty lines at the end of lit.local.cfg NFC

2019-06-17 09:51:07 +00:00

NVPTX

[NVPTX] Fix PR41651

2019-07-30 19:52:01 +00:00

PowerPC

[PowerPC] add tests for fma with negated ops; NFC

2019-08-26 16:20:09 +00:00

RISCV

[MBP] Disable aggressive loop rotate in plain mode

2019-08-22 16:21:32 +00:00

SPARC

[test] Fix tests when run on windows after SVN r369426. NFC.

2019-08-20 20:58:02 +00:00

SystemZ

[SystemZ] Regenerate <8 x i31> store test

2019-07-29 09:49:23 +00:00

Thumb

[MBP] Disable aggressive loop rotate in plain mode

2019-08-22 16:21:32 +00:00

Thumb2

Reapply: [ARM] Fix lsrl with a 128/256 bit shift amount or a shift of 32

2019-08-22 10:29:20 +00:00

WebAssembly

[WebAssembly] Handle aliases in WebAssemblyFixFunctionBitcasts

2019-08-21 19:52:33 +00:00

WinCFGuard

[COFF] Emit @feat.00 on 64-bit and set the CFG bit when emitting guardcf tables

2018-09-19 09:58:30 +00:00

WinEH

IR: print value numbers for unnamed function arguments

2019-08-03 14:28:34 +00:00

X86

[X86] Add a hack to combinePMULDQ to manually turn SIGN_EXTEND_VECTOR_INREG/ZERO_EXTEND_VECTOR_INREG inputs into an ANY_EXTEND_VECTOR_INREG style shuffle

2019-08-26 18:23:26 +00:00

XCore

[lit] Delete empty lines at the end of lit.local.cfg NFC

2019-06-17 09:51:07 +00:00