llvm/test/CodeGen/Generic
Jakob Stoklund Olesen 6660ed5f2f Don't run RAFast in the optimizing regalloc pipeline.
The fast register allocator is not supposed to work in the optimizing
pipeline. It doesn't make sense to compute live intervals, run full copy
coalescing, and then run RAFast.

Fast register allocation in the optimizing pipeline is better done by
RABasic.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158242 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-08 23:15:12 +00:00
..
2002-04-14-UnexpectedUnsignedType.ll
2002-04-16-StackFrameSizeAlignment.ll
2003-05-27-phifcmpd.ll
2003-05-27-useboolinotherbb.ll
2003-05-27-usefsubasbool.ll
2003-05-28-ManyArgs.ll
2003-05-30-BadFoldGEP.ll
2003-05-30-BadPreselectPhi.ll
2003-07-06-BadIntCmp.ll
2003-07-07-BadLongConst.ll
2003-07-08-BadCastToBool.ll
2003-07-29-BadConstSbyte.ll
2004-05-09-LiveVarPartialRegister.ll
2005-01-18-SetUO-InfLoop.ll
2005-04-09-GlobalInPHI.ll
2005-10-18-ZeroSizeStackObject.ll
2005-10-21-longlonggtu.ll
2005-12-01-Crash.ll
2005-12-12-ExpandSextInreg.ll
2006-01-12-BadSetCCFold.ll
2006-01-18-InvalidBranchOpcodeAssert.ll
2006-02-12-InsertLibcall.ll
2006-03-01-dagcombineinfloop.ll
2006-04-26-SetCCAnd.ll
2006-04-28-Sign-extend-bool.ll
2006-05-06-GEP-Cast-Sink-Crash.ll
2006-06-12-LowerSwitchCrash.ll
2006-06-13-ComputeMaskedBitsCrash.ll
2006-06-28-SimplifySetCCCrash.ll
2006-07-03-schedulers.ll
2006-08-30-CoalescerCrash.ll
2006-09-02-LocalAllocCrash.ll Don't run RAFast in the optimizing regalloc pipeline. 2012-06-08 23:15:12 +00:00
2006-09-06-SwitchLowering.ll
2006-10-27-CondFolding.ll
2006-10-29-Crash.ll
2006-11-20-DAGCombineCrash.ll
2007-01-15-LoadSelectCycle.ll
2007-02-25-invoke.ll Update to the new EH scheme. 2011-08-25 23:48:37 +00:00
2007-04-08-MultipleFrameIndices.ll
2007-04-13-SwitchLowerBadPhi.ll
2007-04-17-lsr-crash.ll
2007-04-27-InlineAsm-X-Dest.ll
2007-04-27-LargeMemObject.ll
2007-04-30-LandingPadBranchFolding.ll Update to the new EH scheme. 2011-08-25 23:48:37 +00:00
2007-05-03-EHTypeInfo.ll
2007-05-15-InfiniteRecursion.ll
2007-12-17-InvokeAsm.ll Try to eliminate the use of the 'unwind' instruction. 2011-09-02 22:41:11 +00:00
2007-12-31-UnusedSelector.ll Remove all references to the old EH. 2012-01-31 02:09:07 +00:00
2008-01-25-dag-combine-mul.ll
2008-01-30-LoadCrash.ll
2008-02-04-Ctlz.ll Manually upgrade the test suite to specify the flag to cttz and ctlz. 2011-12-12 11:59:10 +00:00
2008-02-04-ExtractSubvector.ll
2008-02-20-MatchingMem.ll
2008-02-25-NegateZero.ll
2008-02-26-NegatableCrash.ll
2008-08-07-PtrToInt-SmallerInt.ll
2009-03-17-LSR-APInt.ll
2009-03-29-SoftFloatVectorExtract.ll
2009-04-10-SinkCrash.ll
2009-04-28-i128-cmp-crash.ll
2009-06-03-UnreachableSplitPad.ll Update to the new EH scheme. 2011-08-25 23:48:37 +00:00
2009-11-16-BadKillsCrash.ll Remove all references to the old EH. 2012-01-31 02:09:07 +00:00
2010-07-27-DAGCombineCrash.ll
2010-11-04-BigByval.ll PR11004: Inline memcpy to avoid generating nested call sequence. Un-XFAIL 2011-06-09-TailCallByVal and 2010-11-04-BigByval 2011-09-26 06:13:20 +00:00
2010-ZeroSizedArg.ll
2011-01-06-BigNumberCrash.ll
2011-07-07-ScheduleDAGCrash.ll XFAIL this test on arm until the backend is fixed. 2011-09-01 18:40:03 +00:00
2012-06-08-APIntCrash.ll Fix a crash in APInt::lshr when shiftAmt > BitWidth. 2012-06-08 18:04:52 +00:00
add-with-overflow-24.ll
add-with-overflow-128.ll
add-with-overflow.ll
addr-label.ll
APIntLoadStore.ll test/CodeGen/Generic/APIntLoadStore.ll: Mark as XFAIL:ppc since r157911. 2012-06-08 16:28:06 +00:00
APIntParam.ll
APIntSextParam.ll
APIntZextParam.ll
asm-large-immediate.ll
badarg6.ll
badCallArgLRLLVM.ll
badFoldGEP.ll
BasicInstrs.ll
bool-to-double.ll
builtin-expect.ll Introduce "expect" intrinsic instructions. 2011-07-06 18:22:43 +00:00
call2-ret0.ll
call-ret0.ll
call-ret42.ll
call-void.ll
cast-fp.ll
ConstantExprLowering.ll
constindices.ll
crash.ll revert my previous patches that introduced an additional parameter to the objectsize intrinsic. 2012-05-22 15:25:31 +00:00
dbg_value.ll
div-neg-power-2.ll
edge-bundles-blockIDs.ll Don't run RAFast in the optimizing regalloc pipeline. 2012-06-08 23:15:12 +00:00
empty-load-store.ll
exception-handling.ll LSR wants to split the landing pad's critical edge. Let it do it, but use the 2011-08-25 05:55:40 +00:00
externally_available.ll
fastcall.ll
fneg-fabs.ll
fp_to_int.ll
fp-to-int-invalid.ll
fpowi-promote.ll
fwdtwice.ll
global-ret0.ll
hello.ll
i128-addsub.ll
i128-arith.ll
inline-asm-special-strings.ll
intrinsics.ll
invalid-memcpy.ll rip out a ton of intrinsic modernization logic from AutoUpgrade.cpp, which is 2011-06-18 06:05:24 +00:00
isunord.ll
lit.local.cfg Replace all instances of dg.exp file with lit.local.cfg, since all tests are run with LIT now and now Dejagnu. dg.exp is no longer needed. 2012-02-16 06:28:33 +00:00
llvm-ct-intrinsics.ll Manually upgrade the test suite to specify the flag to cttz and ctlz. 2011-12-12 11:59:10 +00:00
Makefile
multiple-return-values-cross-block-with-invoke.ll Update to the new EH scheme. 2011-08-25 23:48:37 +00:00
negintconst.ll
nested-select.ll
overflow.ll
pr2625.ll
pr3288.ll
pr12507.ll Don't try to zExt just to check if an integer constant is zero, it might 2012-04-10 00:16:22 +00:00
print-add.ll
print-arith-fp.ll
print-arith-int.ll
print-int.ll
print-machineinstrs.ll Add an insertPass API to TargetPassConfig. <rdar://problem/11498613> 2012-05-30 00:17:12 +00:00
print-mul-exp.ll
print-mul.ll
print-shift.ll
ret0.ll
ret42.ll
select-cc.ll
select.ll Add VSELECT to LegalizeVectorTypes::ScalariseVectorResult. Previously it would crash if it encountered a 1 element VSELECT. Solution is slightly more complicated than just creating a SELET as we have to mask or sign extend the vector condition if it had different boolean contents from the scalar condition. Fixes <rdar://problem/11178095> 2012-04-03 22:57:55 +00:00
shift-int64.ll
stacksave-restore.ll
storetrunc-fp.ll
switch-lower-feature.ll
switch-lower.ll
trap.ll
v-split.ll
vector-casts.ll
vector-constantexpr.ll
vector-identity-shuffle.ll
vector.ll
zero-sized-array.ll Make codegen able to handle values of empty types. This is one way 2011-05-13 15:18:06 +00:00