Marina Yatsina 5a0390f3ad [X86] Add SAL mnemonics for Intel syntax ...

SAL and SHL instructions perform the same operation

Differential Revision: http://reviews.llvm.org/D11882


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244588 91177308-0d34-0410-b5e6-96231b3b80d8

2015-08-11 12:05:06 +00:00

..

AArch64

Fix another case of 'CHECK[^:]*$'. NFCI

2015-08-10 19:22:55 +00:00

AMDGPU

AMDGPU/SI: Use InstAlias instead of MnemonicAlias for VOPC instructions

2015-08-07 22:00:56 +00:00

ARM

Fix a bunch of trivial cases of 'CHECK[^:]*$' in the tests. NFCI

2015-08-10 19:01:27 +00:00

AsmParser

Fix a bunch of trivial cases of 'CHECK[^:]*$' in the tests. NFCI

2015-08-10 19:01:27 +00:00

COFF

[MC] Correctly escape .safeseh's symbol

2015-07-13 18:51:15 +00:00

Disassembler

[mips] Remap move as or.

2015-08-11 08:56:25 +00:00

ELF

DI: Disallow uniquable DICompileUnits

2015-08-03 17:26:41 +00:00

Hexagon

[Hexagon] Reapply r239097 with tests corrected for shuffling and duplexing.

2015-06-05 16:00:11 +00:00

MachO

Force the MachO generated for Darwin to have VERSION_MIN load command

2015-08-05 15:36:38 +00:00

Markup

MC: Simple example parser for MC assembly markup.

2012-10-31 23:24:13 +00:00

Mips

[mips] Remap move as or.

2015-08-11 08:56:25 +00:00

PowerPC

[PPC] Implement vmrgew and vmrgow instructions

2015-06-25 15:17:40 +00:00

Sparc

Add lduw and lwua aliases for SPARCv9.

2015-08-10 23:47:22 +00:00

SystemZ

[SystemZ] Add z13 vector facility and MC support

2015-05-05 19:23:40 +00:00

X86

[X86] Add SAL mnemonics for Intel syntax

2015-08-11 12:05:06 +00:00