llvm/test/CodeGen/Thumb2/thumb2-mls.ll
Joerg Sonnenberger aca2998f14 Enabling thumb2 mode used to force support for armv6t2. Replace this
with a temporary assertion and adjust the various test cases.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197224 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-13 11:16:00 +00:00

20 lines
455 B
LLVM

; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
define i32 @f1(i32 %a, i32 %b, i32 %c) {
%tmp1 = mul i32 %a, %b
%tmp2 = sub i32 %c, %tmp1
ret i32 %tmp2
}
; CHECK-LABEL: f1:
; CHECK: mls r0, r0, r1, r2
; sub doesn't commute, so no mls for this one
define i32 @f2(i32 %a, i32 %b, i32 %c) {
%tmp1 = mul i32 %a, %b
%tmp2 = sub i32 %tmp1, %c
ret i32 %tmp2
}
; CHECK-LABEL: f2:
; CHECK: muls r0, r1, r0