llvm/test/CodeGen
Evan Cheng 67fcf56ac4 If a val# is defined by an implicit_def and it is being removed, all of the copies off the val# were removed. This causes problem later since the scavenger will see uses of registers without defs. The proper solution is to change the copies into implicit_def's instead.
TurnCopyIntoImpDef turns a copy into implicit_def and remove the val# defined by it. This causes an scavenger assertion later if the def reaches other blocks. Disable the transformation if the value live interval extends beyond its def block.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73478 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-16 07:12:58 +00:00
..
Alpha Fix Alpha test and support for private linkage. 2009-01-15 21:51:46 +00:00
ARM If a val# is defined by an implicit_def and it is being removed, all of the copies off the val# were removed. This causes problem later since the scavenger will see uses of registers without defs. The proper solution is to change the copies into implicit_def's instead. 2009-06-16 07:12:58 +00:00
CBackend Fix an erroneous check for isFNeg; the FNeg case is handled 2009-06-04 23:43:29 +00:00
CellSPU Add some generic expansion logic for SMULO and UMULO. Fixes UMULO 2009-06-16 06:58:29 +00:00
CPP Fix code emission for conditional branches. 2009-05-04 19:10:38 +00:00
Generic Split the Add, Sub, and Mul instruction opcodes into separate 2009-06-04 22:49:04 +00:00
IA64 Add the private linkage. 2009-01-15 20:18:42 +00:00
Mips Split the Add, Sub, and Mul instruction opcodes into separate 2009-06-04 22:49:04 +00:00
MSP430 Split the Add, Sub, and Mul instruction opcodes into separate 2009-06-04 22:49:04 +00:00
PowerPC Add some generic expansion logic for SMULO and UMULO. Fixes UMULO 2009-06-16 06:58:29 +00:00
SPARC Split the Add, Sub, and Mul instruction opcodes into separate 2009-06-04 22:49:04 +00:00
X86 Add some generic expansion logic for SMULO and UMULO. Fixes UMULO 2009-06-16 06:58:29 +00:00
XCore Split the Add, Sub, and Mul instruction opcodes into separate 2009-06-04 22:49:04 +00:00