Puyan Lotfi a7f9b6aaad [MIR-Canon] Improving performance by switching to named vregs. ...

No more skipping thounsands of vregs. Much faster running time.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329246 91177308-0d34-0410-b5e6-96231b3b80d8

2018-04-05 00:27:15 +00:00

..

AArch64

AArch64: Implement support for the shadowcallstack attribute.

2018-04-04 21:55:44 +00:00

AMDGPU

AMDGPU: Dimension-aware image intrinsics

2018-04-04 10:58:54 +00:00

ARC

[ARC] Add ARC backend.

2017-08-24 15:40:33 +00:00

ARM

[DAGCombine] Improve ReduceLoadWidth for SRL

2018-04-04 09:26:56 +00:00

AVR

[AVR] Add a regression test for struct return lowering

2018-03-20 11:23:03 +00:00

BPF

bpf: fix incorrect SELECT_CC lowering

2018-04-03 03:56:37 +00:00

Generic

Try to fix a couple tests for Windows.

2018-03-29 18:59:33 +00:00

Hexagon

[Hexagon] Remove unneeded attributes from lit test

2018-04-03 16:05:20 +00:00

Inputs

…

Lanai

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

Mips

[RegisterCoalescing] Don't move COPY if it would interfere with another value

2018-03-28 06:01:30 +00:00

MIR

[MIR-Canon] Improving performance by switching to named vregs.

2018-04-05 00:27:15 +00:00

MSP430

Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)

2018-01-19 17:13:12 +00:00

Nios2

[Nios2] Arithmetic instructions for R1 and R2 ISA.

2018-01-09 11:15:08 +00:00

NVPTX

[NVPTX] Make tensor shape part of WMMA intrinsic's name.

2018-03-21 21:55:02 +00:00

PowerPC

[Power9]Legalize and emit code for quad-precision fma instructions

2018-04-04 16:43:50 +00:00

RISCV

[RISCV] Use init_array instead of ctors for RISCV target, by default

2018-03-24 18:37:19 +00:00

SPARC

Re-enable "[MachineCopyPropagation] Extend pass to do COPY source forwarding"

2018-02-27 16:59:10 +00:00

SystemZ

Use local symbols for creating .stack-size.

2018-03-26 20:40:22 +00:00

Thumb

[ARM] Fix "Constant pool entry out of range!" in Thumb1 mode

2018-03-23 17:53:27 +00:00

Thumb2

[CodeGen] Add a new pass for PostRA sink

2018-03-22 20:06:47 +00:00

WebAssembly

[WebAssembly] Strip threadlocal attribute from globals in single thread mode

2018-03-20 22:01:32 +00:00

WinCFGuard

Reland "Emit Function IDs table for Control Flow Guard"

2018-01-09 23:49:30 +00:00

WinEH

Make x86 __ehhandler comdat if parent function is

2017-10-20 17:04:43 +00:00

X86

[X86] Separate BSWAP32r and BSWAP64r scheduling data in SandyBridge/Haswell/Broadwell/Skylake scheduler models.

2018-04-04 17:54:19 +00:00

XCore

Use .set instead of = when printing assignment in assembly output

2018-03-27 16:44:41 +00:00