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llvm/lib/Target/Hexagon
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Krzysztof Parzyszek 72f099b5f0 [Hexagon] Disable expanding MUX instructions that define a subregister 
The code in HexagonExpandCondsets.cpp does not handle those cases at the
moment.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@271281 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-31 14:27:10 +00:00
..
AsmParser
Avoid some copies by using const references.
2016-05-27 12:30:51 +00:00
Disassembler
[NFC] Header cleanup
2016-04-18 09:17:29 +00:00
MCTargetDesc
[Hexagon] Separate C8 and USR to avoid unwanted subregister composition
2016-05-28 01:51:16 +00:00
TargetInfo
Remove autoconf support
2016-01-26 21:29:08 +00:00
BitTracker.cpp
[Hexagon] Fix compilation error with GCC 6
2016-02-18 16:10:27 +00:00
BitTracker.h
-Wdeprecated-clean: Fix cases of violating the rule of 5 in ways that are deprecated in C++11
2015-08-01 05:31:27 +00:00
CMakeLists.txt
Touch Hexagon/CMakeLists.txt to regenerate build files, since r268641 complains of missing HexagonAlias.td on ninja.
2016-05-05 19:28:01 +00:00
Hexagon.h
[Hexagon] Improve lowering of instructions to the MC layer
2015-12-02 23:08:29 +00:00
Hexagon.td
[Hexagon] Merge HexagonAlias.td into HexagonInstrAlias.td, NFC
2016-05-05 16:19:36 +00:00
HexagonAsmPrinter.cpp
[NFC] Header cleanup
2016-04-18 09:17:29 +00:00
HexagonAsmPrinter.h
[Hexagon] Preprocess mapped instructions before lowering to MC
2015-12-15 17:05:45 +00:00
HexagonBitSimplify.cpp
Add optimization bisect opt-in calls for Hexagon passes
2016-04-26 19:46:28 +00:00
HexagonBitTracker.cpp
CodeGen: TII: Take MachineInstr& in predicate API, NFC
2016-02-23 02:46:52 +00:00
HexagonBitTracker.h
[Hexagon] Move BitTracker into the llvm namespace and remove redundant qualifications
2015-07-13 20:38:16 +00:00
HexagonBlockRanges.cpp
[hexagon] Move BlockRanges and RDF stuff into the llvm namespace.
2016-05-27 10:06:40 +00:00
HexagonBlockRanges.h
[hexagon] Move BlockRanges and RDF stuff into the llvm namespace.
2016-05-27 10:06:40 +00:00
HexagonBranchRelaxation.cpp
[Hexagon] Implement branch relaxation
2016-04-19 18:30:18 +00:00
HexagonCallingConv.td
…
HexagonCFGOptimizer.cpp
[scan-build] fix warnings emitted on LLVM Hexagon code base
2016-05-05 22:00:44 +00:00
HexagonCommonGEP.cpp
[scan-build] fix dead store warnings emitted on LLVM Hexagon code base
2016-05-13 13:13:59 +00:00
HexagonCopyToCombine.cpp
Add MachineFunctionProperty checks for AllVRegsAllocated for target passes
2016-04-04 17:09:25 +00:00
HexagonEarlyIfConv.cpp
Add optimization bisect opt-in calls for Hexagon passes
2016-04-26 19:46:28 +00:00
HexagonExpandCondsets.cpp
[Hexagon] Disable expanding MUX instructions that define a subregister
2016-05-31 14:27:10 +00:00
HexagonFixupHwLoops.cpp
[scan-build] fix dead store warnings emitted on LLVM Hexagon code base
2016-05-13 13:13:59 +00:00
HexagonFrameLowering.cpp
Apply clang-tidy's misc-static-assert where it makes sense.
2016-05-27 11:36:04 +00:00
HexagonFrameLowering.h
[Hexagon] Enable the post-RA scheduler
2016-05-26 19:44:28 +00:00
HexagonGenExtract.cpp
Add optimization bisect opt-in calls for Hexagon passes
2016-04-26 19:46:28 +00:00
HexagonGenInsert.cpp
Add optimization bisect opt-in calls for Hexagon passes
2016-04-26 19:46:28 +00:00
HexagonGenMux.cpp
Add optimization bisect opt-in calls for Hexagon passes
2016-04-26 19:46:28 +00:00
HexagonGenPredicate.cpp
Apply clang-tidy's misc-static-assert where it makes sense.
2016-05-27 11:36:04 +00:00
HexagonHardwareLoops.cpp
Add optimization bisect opt-in calls for Hexagon passes
2016-04-26 19:46:28 +00:00
HexagonInstrAlias.td
[Hexagon] Treat all conditional branches as predicted (not-taken by default)
2016-05-09 18:22:07 +00:00
HexagonInstrEnc.td
[Hexagon] Adding skeleton of HVX extension instructions.
2015-10-17 01:33:04 +00:00
HexagonInstrFormats.td
[Hexagon] Remove the remnants of isConstExtProfitable
2015-10-20 19:04:53 +00:00
HexagonInstrFormatsV4.td
[Hexagon] Update instruction formats
2015-11-23 14:09:26 +00:00
HexagonInstrFormatsV60.td
[Hexagon] Update instruction formats
2015-11-23 14:09:26 +00:00
HexagonInstrInfo.cpp
[Hexagon] Simplify HexagonInstrInfo::isPredicable
2016-05-16 16:56:10 +00:00
HexagonInstrInfo.h
[Hexagon] Optimize addressing modes for load/store
2016-04-29 15:49:13 +00:00
HexagonInstrInfo.td
[Hexagon] Treat all conditional branches as predicted (not-taken by default)
2016-05-09 18:22:07 +00:00
HexagonInstrInfoV3.td
[Hexagon] Register save/restore functions do not follow regular conventions
2016-04-25 17:49:44 +00:00
HexagonInstrInfoV4.td
[Hexagon] Register save/restore functions do not follow regular conventions
2016-04-25 17:49:44 +00:00
HexagonInstrInfoV5.td
[Hexagon] Treat transfers of FP immediates are pseudo instructions
2015-11-25 21:40:03 +00:00
HexagonInstrInfoV60.td
[Hexagon] Improve handling of unaligned vector loads and stores
2016-03-28 15:43:03 +00:00
HexagonInstrInfoVector.td
[Hexagon] Hexagon V60 HVX intrinsic defintions
2015-11-26 16:54:33 +00:00
HexagonIntrinsics.td
[Hexagon] Handle operand type differences for A2_tfrpi
2016-05-05 15:29:47 +00:00
HexagonIntrinsicsDerived.td
[Hexagon] Deleting a lot of old variants of intrinsics and updating references.
2015-01-28 18:29:11 +00:00
HexagonIntrinsicsV3.td
[Hexagon] Converting XTYPE/SHIFT intrinsics. Cleaning out old intrinsic patterns and updating tests.
2015-02-03 20:40:52 +00:00
HexagonIntrinsicsV4.td
[Hexagon] Use common Pat classes for selecting code for intrinsics
2016-04-22 18:05:55 +00:00
HexagonIntrinsicsV5.td
[Hexagon] Use common Pat classes for selecting code for intrinsics
2016-04-22 18:05:55 +00:00
HexagonIntrinsicsV60.td
[Hexagon] Use common Pat classes for selecting code for intrinsics
2016-04-22 18:05:55 +00:00
HexagonISelDAGToDAG.cpp
[Hexagon] Remove dead nodes from SelectionDAG to avoid cycles
2016-05-13 18:48:15 +00:00
HexagonISelLowering.cpp
[Hexagon] Recognize "q" and "v" in inline-asm as register constraints
2016-05-18 14:34:51 +00:00
HexagonISelLowering.h
[Hexagon] Recognize "q" and "v" in inline-asm as register constraints
2016-05-18 14:34:51 +00:00
HexagonIsetDx.td
[Hexagon] Reapply r239097 with tests corrected for shuffling and duplexing.
2015-06-05 16:00:11 +00:00
HexagonMachineFunctionInfo.cpp
[weak vtables] Remove a bunch of weak vtables
2013-11-19 00:57:56 +00:00
HexagonMachineFunctionInfo.h
[Hexagon] Speed up frame lowering when no optimizations are enabled
2016-03-28 14:42:03 +00:00
HexagonMachineScheduler.cpp
CodeGen: Update DFAPacketizer API to take MachineInstr&, NFC
2016-02-27 19:09:00 +00:00
HexagonMachineScheduler.h
[NFC] Header cleanup
2016-04-18 09:17:29 +00:00
HexagonMCInstLower.cpp
[Hexagon] Using MustExtend flag on expression instead of passing around bools.
2016-02-29 18:39:51 +00:00
HexagonNewValueJump.cpp
Add optimization bisect opt-in calls for Hexagon passes
2016-04-26 19:46:28 +00:00
HexagonOperands.td
[Hexagon] Adding relocation for code size, cold path optimization allowing a 23-bit 4-byte aligned relocation to be a valid instruction encoding.
2016-02-16 20:38:17 +00:00
HexagonOptAddrMode.cpp
[Hexagon] Move some debug-only variable declarations into DEBUG
2016-05-23 17:31:30 +00:00
HexagonOptimizeSZextends.cpp
Add optimization bisect opt-in calls for Hexagon passes
2016-04-26 19:46:28 +00:00
HexagonPeephole.cpp
Add optimization bisect opt-in calls for Hexagon passes
2016-04-26 19:46:28 +00:00
HexagonRDF.cpp
[Hexagon] Implement RDF-based post-RA optimizations
2016-01-12 19:09:01 +00:00
HexagonRDF.h
[hexagon] Move BlockRanges and RDF stuff into the llvm namespace.
2016-05-27 10:06:40 +00:00
HexagonRDFOpt.cpp
[RDF] Add option to keep dead phi nodes in DFG
2016-04-28 20:17:06 +00:00
HexagonRegisterInfo.cpp
[Hexagon] Make getCallerSavedRegs specific to a register class
2016-05-16 18:02:28 +00:00
HexagonRegisterInfo.h
[Hexagon] Make getCallerSavedRegs specific to a register class
2016-05-16 18:02:28 +00:00
HexagonRegisterInfo.td
[Hexagon] Separate C8 and USR to avoid unwanted subregister composition
2016-05-28 01:51:16 +00:00
HexagonSchedule.td
[Hexagon] Update instruction formats
2015-11-23 14:09:26 +00:00
HexagonScheduleV4.td
TableGen: Check scheduling models for completeness
2016-03-01 20:03:21 +00:00
HexagonScheduleV55.td
TableGen: Check scheduling models for completeness
2016-03-01 20:03:21 +00:00
HexagonScheduleV60.td
TableGen: Check scheduling models for completeness
2016-03-01 20:03:21 +00:00
HexagonSelectCCInfo.td
…
HexagonSelectionDAGInfo.cpp
[Hexagon] Make memcpy lowering thread-safe
2015-12-16 17:29:37 +00:00
HexagonSelectionDAGInfo.h
Rename TargetSelectionDAGInfo into SelectionDAGTargetInfo and move it to CodeGen/
2016-01-27 16:32:26 +00:00
HexagonSplitConst32AndConst64.cpp
[Hexagon] Expand handling of the small-data/bss section
2016-04-21 18:56:45 +00:00
HexagonSplitDouble.cpp
[MIB] Create a helper function getRegState to extract all register flags
2016-05-13 13:01:19 +00:00
HexagonStoreWidening.cpp
Add optimization bisect opt-in calls for Hexagon passes
2016-04-26 19:46:28 +00:00
HexagonSubtarget.cpp
[Hexagon] Add option to enable subregister liveness tracking
2016-05-28 02:02:51 +00:00
HexagonSubtarget.h
[Hexagon] Add option to enable subregister liveness tracking
2016-05-28 02:02:51 +00:00
HexagonSystemInst.td
[Hexagon] Add definitions for trap/pause instructions
2016-04-22 16:25:00 +00:00
HexagonTargetMachine.cpp
[Hexagon] Do not create passes in the constructor of HexagonPassConfig
2016-05-27 20:48:39 +00:00
HexagonTargetMachine.h
Delete Reloc::Default.
2016-05-18 22:04:49 +00:00
HexagonTargetObjectFile.cpp
[Hexagon] Expand handling of the small-data/bss section
2016-04-21 18:56:45 +00:00
HexagonTargetObjectFile.h
[Hexagon] Expand handling of the small-data/bss section
2016-04-21 18:56:45 +00:00
HexagonTargetStreamer.h
Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC)
2015-06-23 09:49:53 +00:00
HexagonTargetTransformInfo.cpp
[Hexagon] Edit a comment. NFC
2015-08-05 21:08:26 +00:00
HexagonTargetTransformInfo.h
constify the Function parameter to the TTI creation callback and
2015-09-16 23:38:13 +00:00
HexagonVLIWPacketizer.cpp
[Hexagon] Be careful about anti-dependencies with a call in packetizer
2016-05-06 19:13:38 +00:00
HexagonVLIWPacketizer.h
CodeGen: Update DFAPacketizer API to take MachineInstr&, NFC
2016-02-27 19:09:00 +00:00
LLVMBuild.txt
[Hexagon] Adding LLVMBuild.txt reference to HexagonAsmParser.
2015-11-09 04:31:02 +00:00
RDFCopy.cpp
[hexagon] Move BlockRanges and RDF stuff into the llvm namespace.
2016-05-27 10:06:40 +00:00
RDFCopy.h
[hexagon] Move BlockRanges and RDF stuff into the llvm namespace.
2016-05-27 10:06:40 +00:00
RDFDeadCode.cpp
[RDF] Improve compile-time performance of dead code elimination
2016-01-18 20:42:47 +00:00
RDFDeadCode.h
[hexagon] Move BlockRanges and RDF stuff into the llvm namespace.
2016-05-27 10:06:40 +00:00
RDFGraph.cpp
[hexagon] Move BlockRanges and RDF stuff into the llvm namespace.
2016-05-27 10:06:40 +00:00
RDFGraph.h
[hexagon] Move BlockRanges and RDF stuff into the llvm namespace.
2016-05-27 10:06:40 +00:00
RDFLiveness.cpp
[hexagon] Move BlockRanges and RDF stuff into the llvm namespace.
2016-05-27 10:06:40 +00:00
RDFLiveness.h
[hexagon] Move BlockRanges and RDF stuff into the llvm namespace.
2016-05-27 10:06:40 +00:00