Tilmann Scheller a744d41a3f ARM: Fix pseudo-instructions for SRS (Store Return State). ... The mapping between SRS pseudo-instructions and SRS native instructions was incorrect, the correct mapping is: srsfa -> srsib srsea -> srsia srsfd -> srsdb srsed -> srsda This fixes <rdar://problem/14214734>. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185155 91177308-0d34-0410-b5e6-96231b3b80d8		2013-06-28 15:09:46 +00:00
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AArch64
ARM	ARM: Fix pseudo-instructions for SRS (Store Return State).	2013-06-28 15:09:46 +00:00
AsmParser
COFF
Disassembler	[Mips Disassembler] Have the DecodeCCRRegisterClass function use the getReg	2013-06-26 22:23:32 +00:00
ELF	Integrate Assembler: Support X86_64_DTPOFF64 relocations	2013-06-28 04:24:32 +00:00
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