Luis Marques 2ce77c86aa [RISCV] Custom lower SHL_PARTS, SRA_PARTS, SRL_PARTS ...

When not optimizing for minimum size (-Oz) we custom lower wide shifts
(SHL_PARTS, SRA_PARTS, SRL_PARTS) instead of expanding to a libcall.

Differential Revision: https://reviews.llvm.org/D59477


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358498 91177308-0d34-0410-b5e6-96231b3b80d8

2019-04-16 14:38:32 +00:00

..

AArch64

Re-commit r357452: SimplifyCFG SinkCommonCodeFromPredecessors: Also sink function calls without used results (PR41259)

2019-04-16 12:13:25 +00:00

AMDGPU

AMDGPU: Fix unreachable when counting register usage of SGPR96

2019-04-15 20:51:12 +00:00

ARC

[ARC] Add ARCOptAddrMode pass to generate postincrement loads/stores.

2019-03-20 20:06:21 +00:00

ARM

Re-commit r357452: SimplifyCFG SinkCommonCodeFromPredecessors: Also sink function calls without used results (PR41259)

2019-04-16 12:13:25 +00:00

AVR

[DAGCombiner] If a TokenFactor would be merged into its user, consider the user later.

2019-03-13 17:07:09 +00:00

BPF

[BPF] add proper multi-dimensional array support

2019-03-28 21:59:49 +00:00

Generic

Fix nondeterminism introduced in r353954

2019-03-26 12:18:08 +00:00

Hexagon

[Hexagon] Fix reuse bug in Vector Loop Carried Reuse pass

2019-04-12 16:37:12 +00:00

Inputs

…

Lanai

[Targets] Add errors for tiny and kernel codemodel on targets that don't support them

2018-12-07 12:10:23 +00:00

Mips

[GlobalISel] Enable CSE in the IRTranslator & legalizer for -O0 with constants only.

2019-04-15 05:04:20 +00:00

MIR

[X86] Merge the different Jcc instructions for each condition code into single instructions that store the condition code as an operand.

2019-04-05 19:28:09 +00:00

MSP430

[DAGCombiner] If a TokenFactor would be merged into its user, consider the user later.

2019-03-13 17:07:09 +00:00

NVPTX

[NVPTX] Fix the codegen for llvm.round.

2019-04-01 16:10:26 +00:00

PowerPC

[PowerPC] Add initialization for some ppc passes

2019-04-12 09:59:40 +00:00

RISCV

[RISCV] Custom lower SHL_PARTS, SRA_PARTS, SRL_PARTS

2019-04-16 14:38:32 +00:00

SPARC

[Sparc] Fix incorrect MI insertion position for spilling f128.

2019-04-10 01:56:32 +00:00

SystemZ

Revert rL357745: [SelectionDAG] Compute known bits of CopyFromReg

2019-04-10 18:00:41 +00:00

Thumb

[ARM] Add an extra constant hoisting test. NFC

2019-04-10 18:05:57 +00:00

Thumb2

[ARM] Add an extra test for constant hoist. NFC

2019-04-10 19:18:58 +00:00

WebAssembly

[WebAssembly] Add mutable-globals to bleeding-edge CPU

2019-04-12 20:39:53 +00:00

WinCFGuard

[COFF] Emit @feat.00 on 64-bit and set the CFG bit when emitting guardcf tables

2018-09-19 09:58:30 +00:00

WinEH

Fix invalid target triples in tests. (NFC)

2019-03-04 23:37:41 +00:00

X86

[X86] Limit the 'x' inline assembly constraint to zmm0-15 when used for a 512 type.

2019-04-15 21:06:32 +00:00

XCore

[DAGCombiner] If a TokenFactor would be merged into its user, consider the user later.

2019-03-13 17:07:09 +00:00