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1766971769
Fixed Win64 calling conventions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149494 91177308-0d34-0410-b5e6-96231b3b80d8
48 lines
2.5 KiB
LLVM
48 lines
2.5 KiB
LLVM
; RUN: llc < %s -mcpu=corei7-avx -mattr=+avx | FileCheck %s
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; PR11862
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
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target triple = "x86_64-pc-win32"
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; This function has live ymm registers across a win64 call.
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; The ymm6-15 registers are still call-clobbered even if xmm6-15 are callee-saved.
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; Verify that callee-saved registers are not being used.
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; CHECK: f___vyf
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; CHECK: pushq %rbp
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; CHECK: vmovmsk
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; CHECK: vmovaps %ymm{{.*}}(%r
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; CHECK: vmovaps %ymm{{.*}}(%r
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; CHECK: call
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; Two reloads. It's OK if these get folded.
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; CHECK: vmovaps {{.*\(%r.*}}, %ymm
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; CHECK: vmovaps {{.*\(%r.*}}, %ymm
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; CHECK: blend
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define <8 x float> @f___vyf(<8 x float> %x, <8 x i32> %__mask) nounwind readnone {
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allocas:
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%bincmp = fcmp oeq <8 x float> %x, zeroinitializer
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%val_to_boolvec32 = sext <8 x i1> %bincmp to <8 x i32>
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%"~test" = xor <8 x i32> %val_to_boolvec32, <i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1>
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%"internal_mask&function_mask25" = and <8 x i32> %"~test", %__mask
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%floatmask.i46 = bitcast <8 x i32> %"internal_mask&function_mask25" to <8 x float>
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%v.i47 = call i32 @llvm.x86.avx.movmsk.ps.256(<8 x float> %floatmask.i46) nounwind readnone
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%any_mm_cmp27 = icmp eq i32 %v.i47, 0
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br i1 %any_mm_cmp27, label %safe_if_after_false, label %safe_if_run_false
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safe_if_run_false: ; preds = %allocas
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%binop = fadd <8 x float> %x, <float -1.000000e+00, float -1.000000e+00, float -1.000000e+00, float -1.000000e+00, float -1.000000e+00, float -1.000000e+00, float -1.000000e+00, float -1.000000e+00>
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%calltmp = call <8 x float> @f___vyf(<8 x float> %binop, <8 x i32> %"internal_mask&function_mask25")
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%binop33 = fadd <8 x float> %calltmp, %x
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%mask_as_float.i48 = bitcast <8 x i32> %"~test" to <8 x float>
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%blend.i52 = call <8 x float> @llvm.x86.avx.blendv.ps.256(<8 x float> %x, <8 x float> %binop33, <8 x float> %mask_as_float.i48) nounwind
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br label %safe_if_after_false
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safe_if_after_false: ; preds = %safe_if_run_false, %allocas
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%0 = phi <8 x float> [ %x, %allocas ], [ %blend.i52, %safe_if_run_false ]
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ret <8 x float> %0
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}
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declare i32 @llvm.x86.avx.movmsk.ps.256(<8 x float>) nounwind readnone
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declare <8 x float> @llvm.x86.avx.maskload.ps.256(i8*, <8 x float>) nounwind readonly
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declare void @llvm.x86.avx.maskstore.ps.256(i8*, <8 x float>, <8 x float>) nounwind
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declare <8 x float> @llvm.x86.avx.blendv.ps.256(<8 x float>, <8 x float>, <8 x float>) nounwind readnone
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