.. |
InstPrinter
|
R600/SI: Print more immediates in hex format
|
2014-04-15 22:32:49 +00:00 |
MCTargetDesc
|
LLVMBuild.txt: Add missing dependencies.
|
2014-04-10 11:16:47 +00:00 |
TargetInfo
|
Prune redundant dependencies in LLVMBuild.txt.
|
2013-12-11 00:30:57 +00:00 |
AMDGPU.h
|
Fix known typos
|
2014-01-24 17:20:08 +00:00 |
AMDGPU.td
|
R600: Recommit 199842: Add work-around for the CF stack entry HW bug
|
2014-01-23 16:18:02 +00:00 |
AMDGPUAsmPrinter.cpp
|
R600/SI: Print code size along with used registers
|
2014-04-15 22:40:47 +00:00 |
AMDGPUAsmPrinter.h
|
R600/SI: Print code size along with used registers
|
2014-04-15 22:40:47 +00:00 |
AMDGPUCallingConv.td
|
|
|
AMDGPUConvertToISA.cpp
|
|
|
AMDGPUFrameLowering.cpp
|
R600: Take alignment into account when calculating the stack offset
|
2014-01-22 19:24:23 +00:00 |
AMDGPUFrameLowering.h
|
|
|
AMDGPUInstrInfo.cpp
|
Fix indentation
|
2014-03-11 00:01:27 +00:00 |
AMDGPUInstrInfo.h
|
|
|
AMDGPUInstrInfo.td
|
R600: Match 24-bit arithmetic patterns in a Target DAGCombine
|
2014-04-07 19:45:41 +00:00 |
AMDGPUInstructions.td
|
R600/SI: Print more immediates in hex format
|
2014-04-15 22:32:49 +00:00 |
AMDGPUIntrinsics.td
|
R600: Add BFE, BFI, and BFM intrinsics to help with writing tests.
|
2014-03-31 18:21:18 +00:00 |
AMDGPUISelDAGToDAG.cpp
|
Break PseudoSourceValue out of the Value hierarchy. It is now the root of its own tree containing FixedStackPseudoSourceValue (which you can use isa/dyn_cast on) and MipsCallEntry (which you can't). Anything that needs to use either a PseudoSourceValue* and Value* is strongly encouraged to use a MachinePointerInfo instead.
|
2014-04-15 07:22:52 +00:00 |
AMDGPUISelLowering.cpp
|
R600: Expand sign extension of vectors.
|
2014-04-16 01:41:30 +00:00 |
AMDGPUISelLowering.h
|
Move ExtractVectorElements to SelectionDAG.
|
2014-04-11 17:47:30 +00:00 |
AMDGPUMachineFunction.cpp
|
|
|
AMDGPUMachineFunction.h
|
|
|
AMDGPUMCInstLower.cpp
|
MachineInstr: introduce explicit_operands and implicit_operands ranges
|
2014-04-05 22:42:04 +00:00 |
AMDGPUMCInstLower.h
|
|
|
AMDGPURegisterInfo.cpp
|
Make consistent use of MCPhysReg instead of uint16_t throughout the tree.
|
2014-04-04 05:16:06 +00:00 |
AMDGPURegisterInfo.h
|
Make consistent use of MCPhysReg instead of uint16_t throughout the tree.
|
2014-04-04 05:16:06 +00:00 |
AMDGPURegisterInfo.td
|
|
|
AMDGPUSubtarget.cpp
|
R600: Recommit 199842: Add work-around for the CF stack entry HW bug
|
2014-01-23 16:18:02 +00:00 |
AMDGPUSubtarget.h
|
R600: Match 24-bit arithmetic patterns in a Target DAGCombine
|
2014-04-07 19:45:41 +00:00 |
AMDGPUTargetMachine.cpp
|
R600/SI: Handle MUBUF instructions in SIInstrInfo::moveToVALU()
|
2014-03-21 15:51:57 +00:00 |
AMDGPUTargetMachine.h
|
|
|
AMDGPUTargetTransformInfo.cpp
|
Fix tabs
|
2014-04-04 20:13:08 +00:00 |
AMDILBase.td
|
|
|
AMDILCFGStructurizer.cpp
|
Implement depth_first and inverse_depth_first range factory functions.
|
2014-04-11 01:50:01 +00:00 |
AMDILInstrInfo.td
|
|
|
AMDILIntrinsicInfo.cpp
|
|
|
AMDILIntrinsicInfo.h
|
|
|
AMDILIntrinsics.td
|
R600: Match sign_extend_inreg to BFE instructions
|
2014-03-17 18:58:11 +00:00 |
AMDILISelLowering.cpp
|
R600: Move computeMaskedBitsForTargetNode out of AMDILISelLowering.cpp
|
2014-03-25 18:18:27 +00:00 |
AMDILRegisterInfo.td
|
|
|
CaymanInstructions.td
|
R600: Match 24-bit arithmetic patterns in a Target DAGCombine
|
2014-04-07 19:45:41 +00:00 |
CMakeLists.txt
|
|
|
EvergreenInstructions.td
|
R600: Expand sign extension of vectors.
|
2014-04-16 01:41:30 +00:00 |
LLVMBuild.txt
|
Add proper dependencies to LLVMBuild.txt in llvm/lib.
|
2013-12-10 05:39:34 +00:00 |
Makefile
|
|
|
Processors.td
|
R600: Recommit 199842: Add work-around for the CF stack entry HW bug
|
2014-01-23 16:18:02 +00:00 |
R600ClauseMergePass.cpp
|
Fix known typos
|
2014-01-24 17:20:08 +00:00 |
R600ControlFlowFinalizer.cpp
|
R600: Correctly handle vertex fetch clauses the precede ENDIFs
|
2014-01-23 18:49:31 +00:00 |
R600Defines.h
|
Fix known typos
|
2014-01-24 17:20:08 +00:00 |
R600EmitClauseMarkers.cpp
|
R600: Register R600EmitClauseMarkers pass
|
2013-12-11 17:51:41 +00:00 |
R600ExpandSpecialInstrs.cpp
|
[C++11] Replace llvm::next and llvm::prior with std::next and std::prev.
|
2014-03-02 12:27:27 +00:00 |
R600InstrFormats.td
|
|
|
R600InstrInfo.cpp
|
[C++11] Replace llvm::next and llvm::prior with std::next and std::prev.
|
2014-03-02 12:27:27 +00:00 |
R600InstrInfo.h
|
Fix known typos
|
2014-01-24 17:20:08 +00:00 |
R600Instructions.td
|
R600: Reorganize tablegen instruction definitions
|
2014-03-24 16:07:25 +00:00 |
R600Intrinsics.td
|
|
|
R600ISelLowering.cpp
|
R600: Expand sign extension of vectors.
|
2014-04-16 01:41:30 +00:00 |
R600ISelLowering.h
|
R600/SI: Fix unreachable with a sext_in_reg to an illegal type.
|
2014-03-27 17:23:24 +00:00 |
R600MachineFunctionInfo.cpp
|
|
|
R600MachineFunctionInfo.h
|
|
|
R600MachineScheduler.cpp
|
Factor MI-Sched in preparation for post-ra scheduling support.
|
2013-12-28 21:56:47 +00:00 |
R600MachineScheduler.h
|
Factor MI-Sched in preparation for post-ra scheduling support.
|
2013-12-28 21:56:47 +00:00 |
R600OptimizeVectorRegisters.cpp
|
Phase 2 of the great MachineRegisterInfo cleanup. This time, we're changing
|
2014-03-13 23:12:04 +00:00 |
R600Packetizer.cpp
|
[C++11] Replace llvm::next and llvm::prior with std::next and std::prev.
|
2014-03-02 12:27:27 +00:00 |
R600RegisterInfo.cpp
|
|
|
R600RegisterInfo.h
|
|
|
R600RegisterInfo.td
|
|
|
R600Schedule.td
|
|
|
R600TextureIntrinsicsReplacer.cpp
|
[Layering] Move InstVisitor.h into the IR library as it is pretty
|
2014-03-06 03:23:41 +00:00 |
R700Instructions.td
|
R600: Reorganize tablegen instruction definitions
|
2014-03-24 16:07:25 +00:00 |
SIAnnotateControlFlow.cpp
|
Add DEBUG_TYPE to SIAnnotateControlFlow
|
2014-02-03 22:58:05 +00:00 |
SIDefines.h
|
|
|
SIFixSGPRCopies.cpp
|
R600/SI: Handle INSERT_SUBREG in SIFixSGPRCopies
|
2014-04-07 19:45:45 +00:00 |
SIInsertWaits.cpp
|
R600/SI: Add intrinsic for S_SENDMSG instruction
|
2014-01-27 07:20:44 +00:00 |
SIInstrFormats.td
|
R600/SI: Handle MUBUF instructions in SIInstrInfo::moveToVALU()
|
2014-03-21 15:51:57 +00:00 |
SIInstrInfo.cpp
|
R600/SI: Refactor SOPC classes slightly.
|
2014-04-11 19:25:18 +00:00 |
SIInstrInfo.h
|
R600/SI: Implement shouldConvertConstantLoadToIntImm
|
2014-03-31 19:54:27 +00:00 |
SIInstrInfo.td
|
R600/SI: Print more immediates in hex format
|
2014-04-15 22:32:49 +00:00 |
SIInstructions.td
|
R600/SI: Refactor SOPC classes slightly.
|
2014-04-11 19:25:18 +00:00 |
SIIntrinsics.td
|
R600/SI: Add intrinsic for BUFFER_LOAD_DWORD* instructions
|
2014-01-27 07:20:51 +00:00 |
SIISelLowering.cpp
|
Convert SelectionDAG::getVTList to use ArrayRef
|
2014-04-16 06:10:51 +00:00 |
SIISelLowering.h
|
R600: Check if a sextload should be used for parameter loads.
|
2014-04-11 20:59:54 +00:00 |
SILowerControlFlow.cpp
|
R600: avoid calling std::next on an iterator that might be end()
|
2014-03-28 13:52:56 +00:00 |
SIMachineFunctionInfo.cpp
|
|
|
SIMachineFunctionInfo.h
|
|
|
SIRegisterInfo.cpp
|
R600/SI: Return the correct index for VGPRs in getHWRegIndex()
|
2014-03-31 14:01:52 +00:00 |
SIRegisterInfo.h
|
|
|
SIRegisterInfo.td
|
R600/SI: Use correct dest register class for V_READFIRSTLANE_B32
|
2014-03-17 17:03:51 +00:00 |
SISchedule.td
|
|
|
SITypeRewriter.cpp
|
[Layering] Move InstVisitor.h into the IR library as it is pretty
|
2014-03-06 03:23:41 +00:00 |